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参数资料
| 型号： | MT18HTF12872G-40EC2 |
| 元件分类： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, 0.6 ns, DMA240 |
| 封装： | DIMM-240 |
| 文件页数： | 9/36页 |
| 文件大小： | 672K |
| 代理商： | MT18HTF12872G-40EC2 |
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512MB, 1GB, 2GB (x72, REGISTERED)
PC2-3200, PC2-4300, 240-Pin DDR2 SDRAM DIMM
09005aef80e5e626
Micron Technology, Inc., reserves the right to change products or specifications without notice.
HTF18C64_128_256x72G_A.fm - Rev. A 9/03 EN
17
2003 Micron Technology. Inc.
Absolute Maximum Ratings
Stresses greater than those listed may cause perma-
nent damage to the device. This is a stress rating only,
and functional operation of the device at these or any
other conditions above those indicated in the opera-
tional sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
NOTE:
1. VDD and VDDQ must track each other. VDDQ must be less than or equal to VDD.
2. VREF is expected to equal VDDQ/2 of the transmitting device and to track variations in the DC level of the same. Peak-
to-peak noise (non-common mode) on VREF may not exceed ±1percent of the DC value. Peak-to-peak AC noise on
VREF may not exceed ±2 percent of VREF (DC). This measurement is to be taken at the nearest VREF bypass capacitor.
3. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal
to VREF and must track variations in the DC level of VREF.
4. VDDQ tracks with VDD; VDDL tracks with VDD.
Input Electrical Characteristics and Operating Conditions
Table 8:
Absolute Maximum DC Ratings
SYMBOL
PARAMETER
MIN
MAX
UNITS
VDD
VDD Supply Voltage Relative to VSS
-1.0
2.3
V
VDDQ
VDDQ Supply Voltage Relative to VSS
-0.5
2.3
V
VDDL
VDDL Supply Voltage Relative to Vss
-0.5
2.3
V
VIN, VOUT
Voltage on any Pin Relative to VSS
-0.5
2.3
V
TSTG
Storage Temperature (Tcase)
-55
100
°C
T
OPR
Operating Temperature (T
OPR) (Ambient)
055
°C
I
Input Leakage Current; Any input 0V
VIN VDD;
VREF input 0V
VIN 0.95V; (All other pins not under
test = 0V)
Command/Address,
RAS#, CAS#, WE#
-5
5
A
S#, CKE
CK, CK#
I
OZ
Output Leakage Current; 0V
VOUT VDDQ; DQs and
ODT are disabled
DQ, DQS
-5
5
A
Table 9:
Recommended DC Operating Conditions
All voltages referenced to VSS
PARAMETER
SYMBOL
MIN
NOM
MAX
UNITS NOTES
Supply Voltage
VDD
1.7
1.8
1.9
V
VDDL Supply Voltage
VDDL
1.7
1.8
1.9
V
I/O Supply Voltage
VDDQ
1.7
1.8
1.9
V
I/O Reference Voltage
VREF
0.49 x VDDQ0.50 x VDDQ0.51 X VDDQV
I/O Termination Voltage (system)
VTT
VREF - 40
VREF
VREF + 40
mV
Table 10:
Input DC Logic Levels
All voltages referenced to VSS
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
Input High (Logic 1) Voltage
VIH(DC)VREF + 125
VDDQ + 300
mV
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