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| 型号： | NAND01GR3B2CN6F |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 128M X 8 FLASH 1.8V PROM, 25000 ns, PDSO48 |
| 封装： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件页数： | 9/65页 |
| 文件大小： | 1473K |
| 代理商： | NAND01GR3B2CN6F |
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NAND01G-B2C
Bus operations
17/65
Data is output when Chip Enable is Low, Write Enable is High, Address Latch Enable is Low,
and Command Latch Enable is Low. The data is output sequentially using the Read Enable
signal.
4.5
Write Protect
Write Protect bus operations are used to protect the memory against program or erase
operations. When the Write Protect signal is Low the device will not accept program or erase
operations and so the contents of the memory array cannot be altered. The Write Protect
signal is not latched by Write Enable to ensure protection even during power-up.
4.6
Standby
When Chip Enable is High the memory enters standby mode, the device is deselected,
outputs are disabled and power consumption is reduced.
Table 5.
Bus operations
Bus operation
E
AL
CL
R
W
WP
I/O0 - I/O7
I/O8 - I/O15(1)
1. Only for x16 devices.
Command input
VIL
VIH
Rising
X(2)
2. WP must be VIH when issuing a program or erase command.
Command
X
Address input
VIL
VIH
VIL
VIH
Rising
X
Address
X
Data input
VIL
VIH
Rising
VIH
Data input
Data output
VIL
Falling
VIH
X
Data output
Write Protect
X
VIL
XX
Standby
VIH
XX
X
VIL/VD
D
XX
Table 6.
Address insertion, x8 devices
Bus cycle(1)
1.
Any additional address input cycles will be ignored.
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
1st
A7
A6
A5
A4
A3
A2
A1
A0
2nd
VIL
A11
A10
A9
A8
3rd
A19
A18
A17
A16
A15
A14
A13
A12
4th
A27
A26
A25
A24
A23
A22
A21
A20
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相关代理商/技术参数 |
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| NAND01GR3B2CWFD | 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film |
| NAND01GR3B2CZA1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory |
| NAND01GR3B2CZA1E | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
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