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参数资料
| 型号： | PF38F40L0YUQ0 |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 16M X 16 FLASH 1.8V PROM, PBGA88 |
| 封装： | 8 X 11 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFBGA-88 |
| 文件页数： | 48/99页 |
| 文件大小： | 1419K |
| 代理商： | PF38F40L0YUQ0 |
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Intel StrataFlash Wireless Memory (L18)
Intel StrataFlash Wireless Memory (L18) with A/D-Multiplexed I/O
Datasheet
July 2006
52
Order Number: 313295-002US
11.0 Programming Operations
The device supports three programming methods: word programming, buffered
programming, and Buffered Enhanced Factory Programming (Buffered EFP). See
Section 9.0, “Device Operations” on page 39 for details on the various programming
commands issued to the device.
Successful programming requires the addressed block to be unlocked. If the block is
locked down, WP# must be deasserted and the block unlocked before attempting to
program the block. Attempting to program a locked block causes a program error
(SR[4] and SR[1] set) and termination of the operation. See Section 13.0, “Security
Modes” on page 60 for details on locking and unlocking blocks.
The following sections describe device programming in detail.
11.1
Word Programming
Word programming operations are initiated by writing the Word Program Setup
command to the device (see Section 9.0, “Device Operations” on page 39). This is
followed by a second write to the device with the address and data to be programmed.
The partition accessed during both write cycles outputs Status Register data when
read. The partition accessed during the second cycle (the data cycle) of the program
command sequence is the location where the data is written. See Figure 31, “Word
Programming can occur in only one partition at a time; all other partitions must be in a
read state or in erase suspend. VPP must be above VPPLK, and within the specified VPPL
min/max values (nominally 1.8 V).
During programming, the Write State Machine (WSM) executes a sequence of
internally-timed events that program the desired data bits at the addressed location,
and verifies that the bits are sufficiently programmed. Programming the flash memory
array changes “ones” to “zeros.” Memory array bits that are zeros can be changed to
ones only by erasing the block (see Section 12.0, “Erase Operations” on page 58).
The Status Register can be examined for programming progress and errors by reading
any address within the partition that is being programmed. The partition remains in the
Read Status Register state until another command is written to that partition. Issuing
the Read Status Register command to another partition address sets that partition to
the Read Status Register state, allowing programming progress to be monitored at that
partition’s address.
Status Register bit SR[7] indicates the programming status while the sequence
executes. Commands that can be issued to the programming partition during
programming are Program Suspend, Read Status Register, Read Device Identifier, CFI
Query, and Read Array (this returns unknown data). In asynchronous mode the falling
edge of OE#, or CE# (whichever occurs first) updates and latches the Status Register
contents. However, reading the Status Register in synchronous burst mode, CE# or
ADV# must be toggled to update status data.
When programming has finished, Status Register bit SR[4] (when set) indicates a
programming failure. If SR[3] is set, the WSM could not perform the word
programming operation because VPP was outside of its acceptable limits. If SR[1] is set,
the word programming operation attempted to program a locked block, causing the
operation to abort.
Before issuing a new command, the Status Register contents should be examined and
then cleared using the Clear Status Register command. Any valid command can follow,
when word programming has completed.
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