- 您现在的位置：买卖IC网 > PDF目录378057 > PM8621-BIAP (PMC-SIERRA INC) NSE-8G⑩ Standard Product Data Sheet Preliminary PDF资料下载
参数资料
| 型号： | PM8621-BIAP |
| 厂商： | PMC-SIERRA INC |
| 元件分类： | 数字传输电路 |
| 英文描述： | NSE-8G⑩ Standard Product Data Sheet Preliminary |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PBGA480 |
| 封装： | 35 X 35 MM, 1.47 MM HEIGHT, UBGA-480 |
| 文件页数： | 137/184页 |
| 文件大小： | 1122K |
| 代理商： | PM8621-BIAP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页当前第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页第183页第184页
NSE-8G Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
136
12.1.4 PCB Design Notes
To maintain flexibility, all unused LVDS inputs and outputs should be left floating. This will
prevent accidental damage caused by firmware enabling outputs, or releasing resets of inactive
ports.
12.2
“C1” Synchronization
Any NSE/SBS fabric can be viewed as a collection of five “columns” of devices: column 0
consists of the ingress flow from the load devices (e.g., some SBI device); column 1 consists of
the ingress flow through the SBS devices; column 2 consists of the NSE-8G device; column 3
consists of the egress flow through the SBS devices; and column 4 consists of the egress flow
through the load devices (e.g. some SBI device). Note that the devices in columns 0 and 4 are
SBI bus devices while columns 1 and 3 are SBS or SBS-lite devices. The dual column references
refer to their two separate simplex flows. Path-aligned STS-12 frames are pipelined through this
structure in a regular fashion, under control of a single clock source and frame pulse. There are
latencies between these columns, and these latencies may vary from path to path. The following
design is used to accommodate these latencies.
A timing pulse for SBI frames (2kHz, 500
=
μ
s) is generated and fed to each device in the fabric.
Each chip has a
FrameDelay
register (RC1DLY) which contains the count of 77.76 MHz clock
ticks that device should delay from the reference timing pulse before expecting the C1 characters
of the ingress STS-12 frames to have arrived. The base timing pulse is called
t
. The delays from
t
based on the settings of the RC1DLY registers in the successive columns of the devices are called
t0, … t4
. The first signal, t
1
(equal to t
0
), determines the start of an STS-12 frame; this signal is
used to instruct the ingress load devices (column 0) to start emitting an STS-12 frame (with its
special “C1” control character) at that time. ti is determined by the customer, based on device and
wiring delays to be approximately the earliest time that all “C1” characters will have arrived in
the ingress FIFOs of the ti column of devices. ti is selected to provide assurance that all “C1”
characters have arrived at the i
th
column. The i
th
column of devices use the ti signal to synchronize
emission of the STS-12 frames. The ingress FIFOs permit a variable latency in C1 arrival of up to
16 clock cycles.
Note: The SBS device, being a memory switch adds a latency of one complete frame or row plus
a few clock ticks to the data.
相关PDF资料 |
PDF描述 |
|---|---|
| PM9311 | Enhanced TT1TM Switch Fabric |
| PM9311-UC | ENHANCED TT1⑩ SWITCH FABRIC |
| PM9312 | Enhanced TT1TM Switch Fabric |
| PM9312-UC | ENHANCED TT1⑩ SWITCH FABRIC |
| PM9313 | Enhanced TT1TM Switch Fabric |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PM87 | 制造商:FERROXCUBE 制造商全称:Ferroxcube International Holding B.V. 功能描述:PM cores |
| PM87/70-3C94 | 制造商:Yageo / Ferroxcube 功能描述:FERRITE CORE PM 3C94 制造商:Yageo / Ferroxcube 功能描述:FERRITE CORE, PM, 3C94, Core Size:PM87, Material Grade:3C94, Effective Magnetic Path Length:146mm, Ae Effective Cross Section Area:910mm2, Inductance Factor Al:15000nH, SVHC:No SVHC (20-Jun-2013), External Depth:70mm, External , RoHS Compliant: Yes |
| PM871 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| PM872 | 制造商:ARTESYN 制造商全称:Artesyn Technologies 功能描述:Single and dual output 10 to 12 Watt Nominal input DC/DC converters |
| PM87-3C90 | 制造商:FERROXCUBE 制造商全称:Ferroxcube International Holding B.V. 功能描述:PM cores |
发布紧急采购，3分钟左右您将得到回复。