- 您现在的位置：买卖IC网 > PDF目录225025 > RC28F160C3BD70 (INTEL CORP) 1M X 16 FLASH 3V PROM, 70 ns, PBGA64 PDF资料下载
参数资料
| 型号： | RC28F160C3BD70 |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | 1M X 16 FLASH 3V PROM, 70 ns, PBGA64 |
| 封装： | BGA-64 |
| 文件页数： | 38/72页 |
| 文件大小： | 1083K |
| 代理商： | RC28F160C3BD70 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页当前第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页
Intel Advanced+ Boot Block Flash Memory (C3)
Datasheet
Intel Advanced+ Boot Block Flash Memory (C3)
May 2005
Order Number: 290645, Revision: 023
43
The contents of the Status Register are latched on the falling edge of OE# or CE# (whichever
occurs last) which prevents possible bus errors that might occur if Status Register contents change
while being read. CE# or OE# must be toggled with each subsequent status read, or the Status
Register will not indicate completion of a Program or Erase operation.
When the WSM is active, SR[7] will indicate the status of the WSM; the remaining bits in the
Status Register indicate whether the WSM was successful in performing the preferred operation
10.1.4.1
Clear Status Register
The WSM can set Status Register bits 1 through 7 and can clear bits 2, 6, and 7, but the WSM
cannot clear Status Register bits 1, 3, 4 or 5. Because bits 1, 3, 4, and 5 indicate various error
conditions, these bits can be cleared only through the Clear Status Register (0x50) command. By
allowing the system software to control the resetting of these bits, several operations may be
performed (such as cumulatively programming several addresses or erasing multiple blocks in
sequence) before reading the Status Register to determine if an error occurred during that series.
Clear the Status Register before beginning another command or sequence. The Read Array
command must be issued before data can be read from the memory array. Resetting the device also
clears the Status Register.
10.2
Program Mode
Programming is executed using a two-write cycle sequence. The Program Setup command (0x40)
is issued to the CUI, followed by a second write that specifies the address and data to be
programmed. The WSM will execute a sequence of internally timed events to program preferred
bits of the addressed location, then verify the bits are sufficiently programmed. Programming the
memory results in specific bits within an address location being changed to a “0.” If users attempt
to program “1”s, the memory cell contents do not change and no error occurs.
The Status Register indicates programming status. While the program sequence executes, status bit
7 is “0.” The Status Register can be polled by toggling either CE# or OE#. While programming, the
only valid commands are Read Status Register, Program Suspend, and Program Resume.
When programming is complete, the program-status bits must be checked. If the programming
operation was unsuccessful, SR[4] is set to indicate a program failure. If SR[3] is set, then VPP was
not within acceptable limits, and the WSM did not execute the program command. If SR[1] is set, a
program operation was attempted on a locked block and the operation was aborted.
The Status Register should be cleared before attempting the next operation. Any CUI instruction
can follow after programming is completed; however, to prevent inadvertent Status Register reads,
be sure to reset the CUI to read-array mode.
10.2.1
12-Volt Production Programming
When VPP is between 1.65 V and 3.6 V, all program and erase current is drawn through the VCC
pin.
Note:
If VPP is driven by a logic signal, VIH min = 1.65 V. That is, VPP must remain above 1.65 V to
perform in-system flash modifications.
相关PDF资料 |
PDF描述 |
|---|---|
| RC4194K | DUAL OUTPUT, ADJUSTABLE MIXED REGULATOR, MBFM9 |
| RM4194K | DUAL OUTPUT, ADJUSTABLE MIXED REGULATOR, MBFM9 |
| RC4194D | DUAL OUTPUT, ADJUSTABLE MIXED REGULATOR, CDIP14 |
| RM4194D/883B | DUAL OUTPUT, ADJUSTABLE MIXED REGULATOR, CDIP14 |
| RM4194D | DUAL OUTPUT, ADJUSTABLE MIXED REGULATOR, CDIP14 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RC28F160C3BD70A | 功能描述:IC FLASH 16MBIT 70NS 64BGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并联 电源电压:2.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
| RC28F160C3TA110 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Advanced+ Boot Block Flash Memory (C3) |
| RC28F160C3TA70 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Advanced+ Boot Block Flash Memory (C3) |
| RC28F160C3TA90 | 制造商:INTEL 制造商全称:Intel Corporation 功能描述:Advanced+ Boot Block Flash Memory (C3) |
| RC28F160C3TA90SB93 | 功能描述:IC FLASH 16MBIT 90NS 64BGA RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:150 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-VFDFN 裸露焊盘 供应商设备封装:8-DFN（2x3） 包装:管件 产品目录页面:1445 (CN2011-ZH PDF) |
发布紧急采购，3分钟左右您将得到回复。