参数资料
型号: S29WS128J0PBFW002
厂商: SPANSION LLC
元件分类: PROM
英文描述: 8M X 16 FLASH 1.8V PROM, 55 ns, PBGA84
封装: 8 X 11.60 MM, LEAD FREE, FBGA-84
文件页数: 2/97页
文件大小: 2421K
代理商: S29WS128J0PBFW002
10
S29WS128J/064J
S29WS-J_00_A6 May 11, 2006
Dat a
S h ee t
Input/Output Descriptions
Amax-A0
=
Address inputs
DQ15-DQ0
=
Data input/output
CE#
=
Chip Enable input. Asynchronous relative to CLK for
the Burst mode.
OE#
=
Output Enable input. Asynchronous relative to CLK
for the Burst mode.
WE#
=
Write Enable input.
VCC
=
Device Power Supply
(1.65 – 1.95 V).
VSS
=
Ground
NC
=
No Connect; not connected internally
RDY
=
Ready output;
In Synchronous Mode, indicates the status of the
Burst read.
Low = data not valid at expected time. High = data
valid.
In Asynchronous Mode, indicates the status of the
internal program and erase function.
Low = program/erase in progress.
High Impedance = program/erase completed.
CLK
=
CLK is not required in asynchronous mode. In burst
mode, after the initial word is output, subsequent
active edges of CLK increment the internal address
counter.
AVD#
=
Address Valid input. Indicates to device that the
valid address is present on the address inputs
(Amax-A0).
Low = for asynchronous mode, indicates valid
address; for burst mode, causes starting address to
be latched.
High = device ignores address inputs
RESET#
=
Hardware reset input. Low = device resets and
returns to reading array data
WP#
=
Hardware write protect input. At VIL, disables
program and erase functions in the four outermost
sectors. Should be at VIH for all other conditions.
ACC
=
At VHH, accelerates programming; automatically
places device in unlock bypass mode. At VIL, locks
all sectors. Should be at VIH for all other conditions.
Note:
1. Amax = A22 (WS128J), A21 (WS064J).
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