参数资料
型号: S29WS128J0PBFW002
厂商: SPANSION LLC
元件分类: PROM
英文描述: 8M X 16 FLASH 1.8V PROM, 55 ns, PBGA84
封装: 8 X 11.60 MM, LEAD FREE, FBGA-84
文件页数: 79/97页
文件大小: 2421K
代理商: S29WS128J0PBFW002
80
S29WS128J/064J
S29WS-J_00_A6 May 11, 2006
Dat a
S h ee t
Erase/Program Operations
Notes:
1. Not 100% tested.
2. Asynchronous mode allows both Asynchronous and Synchronous program operation. Synchronous mode allows both
Asynchronous and Synchronous program operation.
3. In asynchronous program operation timing, addresses are latched on the falling edge of WE# or rising edge of AVD#. In
synchronous program operation timing, addresses are latched on the first of either the rising edge of AVD# or the active
edge of CLK.
4. See the Erase and Programming Performance section for more information.
5. Does not include the preprogramming time.
Parameter
Description
66 MHz
80 MHz
(WS064J only)
Unit
JEDEC
Standard
tAVAV
tWC
Write Cycle Time (Note 1)
Min
45
ns
tAVWL
tAS
Address Setup Time (Notes 2,
Synchronous
Min
4
ns
Asynchronous
0
tWLAX
tAH
Address Hold Time (Notes 2, 3)
Synchronous
Min
5.5
ns
Asynchronous
20
tAVDP
AVD# Low Time
Min
10
ns
tDVWH
tDS
Data Setup Time
Min
20
ns
tWHDX
tDH
Data Hold Time
Min
0
ns
tGHWL
Read Recovery Time Before Write
Min
0
ns
tCAS
CE# Setup Time to AVD#
Min
0
ns
tWHEH
tCH
CE# Hold Time
Min
0
ns
tWLWH
tWP
Write Pulse Width
Min
20
ns
tWHWL
tWPH
Write Pulse Width High
Min
20
ns
tSR/W
Latency Between Read and Write Operations
Min
0
ns
tWHWH1
Programming Operation (Note 4)
Typ
<7
s
tWHWH1
Accelerated Programming Operation (Note 4)
Typ
<4
s
tWHWH2
Sector Erase Operation (Notes 4, 5)
Typ
<0.2
sec
Chip Erase Operation (Notes 4, 5)
<104
tVID
VACC Rise and Fall Time
Min
500
ns
tVIDS
VACC Setup Time (During Accelerated Programming)
Min
1
s
tVCS
VCC Setup Time
Min
50
s
tELWL
tCS
CE# Setup Time to WE#
Min
0
ns
tAVSW
AVD# Setup Time to WE#
Min
4
ns
tAVHW
AVD# Hold Time to WE#
Min
4
ns
tAVHC
AVD# Hold Time to CLK
Min
4
ns
tCSW
Clock Setup Time to WE#
Min
5
ns
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