参数资料
型号: S29WS128J0PBFW002
厂商: SPANSION LLC
元件分类: PROM
英文描述: 8M X 16 FLASH 1.8V PROM, 55 ns, PBGA84
封装: 8 X 11.60 MM, LEAD FREE, FBGA-84
文件页数: 74/97页
文件大小: 2421K
代理商: S29WS128J0PBFW002
76
S29WS128J/064J
S29WS-J_00_A6 May 11, 2006
Dat a
S h ee t
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from
two cycles to seven cycles. Clock is set for active rising edge.
2. If any burst address occurs at a 64-word boundary, two additional clock cycle are inserted, and is indicated by RDY.
3. The device is in synchronous mode with wrap around.
4. D0-D7 in data waveform indicates the order the data within a given 8-word address range, from lowest to highest.
Starting address in figure is the 4th address in range (AC)
Figure 18. 8-word Linear Burst with Wrap Around
Notes:
1. Figure assumes 6 wait states for initial access and synchronous read.
2. The Set Configuration Register command sequence has been written with A18=0; device will output RDY one cycle before
valid data.
Figure 19. Linear Burst with RDY Set One Cycle Before Data
DC
DD
OE#
Data
Addresses
AC
AVD#
RDY
CLK
CE#
tCES
tACS
tAVC
tAVD
tACH
tOE
tIACC
tBDH
DE
DF
DB
7 cycles for initial access shown.
Hi-Z
tRACC
1
2
3
456
7
tRDYS
tBACC
tCR
D8
tRACC
Da+1
Da
Da+2
Da+3
Da + n
OE#
Data
Addresses
Aa
AVD#
RDY
CLK
CE#
tCES
tACS
tAVC
tAVD
tACH
tOE
tRACC
tOEZ
tCEZ
tIACC
tBDH
6 wait cycles for initial access shown.
Hi-Z
1
2
3
456
tRDYS
tBACC
tCR
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