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Contents
Section 1
Overview.......................................................................................................................................
1
1.1
SH7709 Features...........................................................................................................................................
1
1.2
Pin Description ..............................................................................................................................................
5
1.2.1
Pin Arrangement...........................................................................................................................
5
1.2.2
Pin Functions .................................................................................................................................
7
Section 2
CPU.................................................................................................................................................. 11
2.1
Register Configuration ............................................................................................................................... 11
2.1.1
Privileged Mode and Banks....................................................................................................
11
2.1.2
General Registers.........................................................................................................................
14
2.1.3
System Registers..........................................................................................................................
15
2.1.4
Control Registers..........................................................................................................................
15
2.2
Data Formats .................................................................................................................................................. 17
2.2.1
Data Format in Registers .........................................................................................................
17
2.2.2
Data Format in Memory ...........................................................................................................
17
2.3
Instruction Features .....................................................................................................................................
18
2.3.1
Execution Environment .............................................................................................................
18
2.3.2
Addressing Modes........................................................................................................................ 20
2.3.3
Instruction Formats...................................................................................................................... 24
2.4
Instruction Set ................................................................................................................................................ 27
2.4.1
Instruction Set Classified by Function............................................................................... 27
2.4.2
Instruction Code Map................................................................................................................. 43
2.5
Processor States and Processor Modes .............................................................................................. 46
2.5.1
Processor States............................................................................................................................
46
2.5.2
Processor Modes...........................................................................................................................
47
Section 3
Memory Management Unit (MMU)........................................................................ 49
3.1
Overview........................................................................................................................................................... 49
3.1.1
Features ............................................................................................................................................
49
3.1.2
Role of MMU.................................................................................................................................
49
3.1.3
Virtual Address Space ...............................................................................................................
52
3.1.4
Register Configuration...............................................................................................................
55
3.2
Register Description....................................................................................................................................
56
3.3
TLB Functions ...............................................................................................................................................
58
3.3.1
Configuration of the TLB.........................................................................................................
58
3.3.2
TLB Indexing .................................................................................................................................
60