![](http://datasheet.mmic.net.cn/120000/SH7709_datasheet_3575232/SH7709_454.png)
444
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
LSB
MSB
Synchroni-
zation clock
Serial data
**
One unit of communication data (character or frame)
Note:
High except in continuous transmitting or receiving
Figure 14.17
Data Format in Clock Synchronous Communication
In clock synchronous serial communication, each data bit is output on the communication
line from one falling edge of the serial clock to the next. Data are guaranteed valid at the
rising edge of the serial clock. In each character, the serial data bits are transmitted in order
from the LSB (first) to the MSB (last). After output of the MSB, the communication line
remains in the state of the MSB. In the clock synchronous mode, the SCI transmits or
receives data by synchronizing with the falling edge of the serial clock.
Communication Format: The data length is fixed at eight bits. No parity bit or
multiprocessor bit can be added.
Clock: An internal clock generated by the on-chip baud rate generator or an external clock
input from the SCK pin can be selected as the SCI transmit/receive clock. The clock source
is selected by the C/
A bit in the serial mode register (SCSMR) and bits CKE1 and CKE0 in
the serial control register (SCSCR). See table 14.10.
When the SCI operates on an internal clock, it outputs the clock signal at the SCK pin. Eight
clock pulses are output per transmitted or received character. When the SCI is not
transmitting or receiving, the clock signal remains in the high state. When only receiving, the
SCI receives in 2-character units, so a 16 pulse synchronization clock is output. To receive in
1-character units, select an external clock source.
Transmitting and Receiving Data: SCI Initialization (clock synchronous mode). Before
transmitting, receiving, or changing the mode or communication format, the software must
clear the TE and RE bits to 0 in the serial control register (SCSCR), then initialize the SCI.
Clearing TE to 0 sets TDRE to 1 and initializes the transmit shift register (SCTSR). Clearing
RE to 0, however, does not initialize the RDRF, PER, FER, and ORER flags and receive
data register (SCRDR), which retain their previous contents.
Figure 14.18 is a sample flowchart for initializing the SCI. The procedure for initializing the
SCI is: