![](http://datasheet.mmic.net.cn/120000/SH7709_datasheet_3575232/SH7709_413.png)
403
bit (PE) is set to 1 to enable parity addition and check. The O/
E setting is ignored in the
clock synchronous mode, or in the asynchronous mode when parity addition and check is
disabled.
Bit 4: O/
E
Description
0
Even parity (initial value). If even parity is selected, the parity bit is
added to transmit data to make an even number of 1s in the
transmitted character and parity bit combined. Receive data is
checked to see if it has an even number of 1s in the received
character and parity bit combined.
1
Odd parity. If odd parity is selected, the parity bit is added to transmit
data to make an odd number of 1s in the transmitted character and
parity bit combined. Receive data is checked to see if it has an odd
number of 1s in the received character and parity bit combined.
Bit 3—Stop Bit Length (STOP): Selects one or two bits as the stop bit length in the
asynchronous mode. This setting is used only in the asynchronous mode. It is ignored in the
clock synchronous mode because no stop bits are added.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the
second stop bit is 1, it is treated as a stop bit, but if the second stop bit is 0, it is treated as
the start bit of the next incoming character.
Bit 3: STOP
Description
0
One stop bit (initial value). In transmitting, a single bit of 1 is added at
the end of each transmitted character.
1
Two stop bits. In transmitting, two bits of 1 are added at the end of
each transmitted character.
Bit 2—Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor
format is selected, settings of the parity enable (PE) and parity mode (O/
E) bits are ignored.
The MP bit setting is used only in the asynchronous mode; it is ignored in the clock
synchronous mode. For the multiprocessor communication function, see section 14.3.3,
Multiprocessor Communication.
Bit 2: MP
Description
0
Multiprocessor function disabled (initial value)
1
Multiprocessor format selected
Bits 1 and 0—Clock Select 1 and 0 (CKS1 and CKS0): These bits select the internal clock
source of the on-chip baud rate generator. Four clock sources are available. P
φ, Pφ/4, Pφ/16
and P
φ/64. For further information on the clock source, bit rate register settings, and baud
rate, see section 14.2.9, Bit Rate Register.