参数资料
型号: W9725G6KB-25I
厂商: Winbond Electronics
文件页数: 39/87页
文件大小: 0K
描述: IC DDR2 SDRAM 256MBIT 84WBGA
标准包装: 209
格式 - 存储器: RAM
存储器类型: DDR2 SDRAM
存储容量: 256M(16Mx16)
速度: 2.5ns
接口: 并联
电源电压: 1.7 V ~ 1.9 V
工作温度: -40°C ~ 95°C
封装/外壳: 84-TFBGA
供应商设备封装: 84-WBGA(8x12.5)
包装: *
其它名称: Q7118748
W9725G6KB
10.7 Capacitance
SYM.
C CK
C DCK
C I
C DI
C IO
C DIO
PARAMETER
Input Capacitance, CLK and CLK
Input Capacitance delta, CLK and CLK
input Capacitance, all other input-only pins
Input Capacitance delta, all other input-only pins
Input/output Capacitance, DQ, LDM, UDM, LDQS,
LDQS , UDQS, UDQS
Input/output Capacitance delta, DQ, LDM, UDM,
LDQS, LDQS , UDQS, UDQS
MIN.
1.0
?
1.0
?
2.5
?
MAX.
2.0
0.25
1.75
0.25
3.5
0.5
UNIT
pF
pF
pF
pF
pF
pF
10.8 Leakage and Output Buffer Characteristics
SYM.
PARAMETER
MIN.
MAX.
UNIT
NOTES
Input Leakage Current
I IL
( 0V
≤ V IN ≤ V DD )
-2
2
μA
1
Output Leakage Current
I OL
(Output disabled, 0V
≤ V OUT ≤ V DDQ )
-5
5
μA
2
V OH
V OL
Minimum Required Output Pull-up
Maximum Required Output Pull-down
V TT + 0.603
?
?
V TT - 0.603
V
V
V OTR
I OH(dc)
I OL(dc)
Output Timing Measurement Reference Level
Output Minimum Source DC Current
Output Minimum Sink DC Current
0.5 x VDDQ
-13.4
13.4
?
?
?
V
mA
mA
3
4, 6
5, 6
Notes:
1. All other pins not under test = 0 V.
2. DQ, LDQS, LDQS , UDQS, UDQS are disabled and ODT is turned off.
3. The V DDQ of the device under test is referenced.
4. V DDQ = 1.7 V; V OUT = 1.42 V. (V OUT - V DDQ )/I OH must be less than 21 Ω for values of V OUT between V DDQ and V DDQ -
0.28V.
5. V DDQ = 1.7 V; V OUT = 0.28V. V OUT /I OL must be less than 21 Ω for values of V OUT between 0 V and 0.28V.
6. The values of I OH(dc) and IOL(dc) are based on the conditions given in Notes 3 and 4. They are used to test drive current
capability to ensure V IH min plus a noise margin and V IL max minus a noise margin are delivered to an SSTL_18 receiver.
Publication Release Date: Sep. 03, 2012
- 39 -
Revision A03
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