参数资料
| 型号： | ADV7184BSTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/112页 |
| 文件大小： | 0K |
| 描述： | IC DECODER VID SDTV MULTI 80LQFP |
| 标准包装： | 1 |
| 类型： | 视频解码器 |
| 应用： | 投影仪，录音机，安全 |
| 电压 - 电源，模拟： | 3.15 V ~ 3.45 V |
| 电压 - 电源，数字： | 1.65 V ~ 2 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 托盘 |
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ADV7184
Rev. A | Page 102 of 112
Bit1
Address Register
Bit Description
7 6 5 4 3 2 1 0
Comments
Notes
0
No CCAPD data detected.
CCAPD.
1
CCAPD data detected.
Reserved.
x x x
0
Current SD field is odd numbered.
EVEN_FIELD.
1
Current SD field is even numbered.
Reserved.
x x
0
MPU_STIM_INT = 0.
0x45
Raw Status 2 (Read Only)
MPU_STIM_INTRQ.
1
MPU_STIM_INT = 1.
These bits are status bits only.
They cannot be cleared or
masked. Register 0x46 is used
for this purpose.
0
Closed captioning not detected in
the input video signal.
CCAPD_Q.
1
Closed caption data detected in the
video input signal.
0
Gemstar data not detected in the
input video signal.
GEMD_Q.
1
Gemstar data detected in the input
video signal.
Reserved.
x x
0
SD signal has not changed the field
from odd to even or vice versa.
SD_FIELD_CHNGD_Q.
1
SD signal has changed the field from
odd to even or vice versa.
Reserved.
x
Not used.
Reserved.
x
Not used.
0
Manual interrupt not set.
0x46
Interrupt Status 2
(Read Only)
MPU_STIM_INTRQ_Q.
1
Manual interrupt set.
These bits can be cleared or
masked by Registers 0x47 and
0x48, respectively.
Note that interrupt in
Register 0x46 for the CC,
Gemstar, CGMS, and WSS data
is using the Mode 1 data
slicer.
0
Does not clear.
CCAPD_CLR.
1
Clears CCAPD_Q bit.
0
Does not clear.
GEMD_CLR.
1
Clears GEMD_Q bit.
Reserved.
0 0
0
Does not Clear.
SD_FIELD_CHNGD_CLR.
1
Clears SD_FIELD_CHNGD_Q bit.
Reserved.
x
Not used.
Reserved.
x
Not used.
0
Does not clear.
0x47
Interrupt Clear 2
(Write Only)
MPU_STIM_INTRQ_CLR.
1
Clears MPU_STIM_INTRQ_Q bit.
Note that interrupt in
Register 0x46 for the CC,
Gemstar, CGMS, and WSS data
is using the Mode 1 data
slicer.
0
Masks CCAPD_Q bit.
CCAPD_MSKB.
1
Unmasks CCAPD_Q bit.
0
Masks GEMD_Q bit.
GEMD_MSKB.
1
Unmasks GEMD_Q bit.
CGMS_MSKB.
0 0
Masks CGMS_CHNGD_Q bit.
0
Masks SD_FIELD_CHNGD_Q bit.
SD_FIELD_CHNGD_MSKB.
1
Unmasks SD_FIELD_CHNGD_Q bit.
Reserved.
0 0
Not used.
0
Masks MPU_STIM_INTRQ_Q bit.
0x48
Interrupt Mask 2
(Read/Write)
MPU_STIM_INTRQ_MSKB.
1
Unmasks MPU_STIM_INTRQ_Q bit.
Note that interrupt in
Register 0x46 for the CC,
Gemstar, CGMS, and WSS data
is using the Mode 1 data
slicer.
0
SD 60 Hz signal output.
SD_OP_50Hz. This bit indicates if the
SD 60 Hz or SD 50 Hz frame rate is at output.
1
SD 50 Hz signal output.
0
SD vertical sync lock not established.
SD_V_LOCK.
1
SD vertical sync lock established.
0
SD horizontal sync lock not
established.
SD_H_LOCK.
1
SD horizontal sync lock established.
Reserved.
x
Not used.
0
SECAM lock not established.
SCM_LOCK.
1
SECAM lock established.
Reserved.
x
Not used.
Reserved.
x
Not used.
0x49
Raw Status 3
(Read Only)
Reserved.
x
Not used.
These bits are status bits only.
They cannot be cleared or
masked. Register 0x4A is used
for this purpose.
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| ADV7186BBCZ | 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064 |
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