参数资料
| 型号： | ADV7184BSTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 79/112页 |
| 文件大小： | 0K |
| 描述： | IC DECODER VID SDTV MULTI 80LQFP |
| 标准包装： | 1 |
| 类型： | 视频解码器 |
| 应用： | 投影仪，录音机，安全 |
| 电压 - 电源，模拟： | 3.15 V ~ 3.45 V |
| 电压 - 电源，数字： | 1.65 V ~ 2 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 托盘 |
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ADV7184
Rev. A | Page 69 of 112
Table 83. GS/VPS/PDC/UTC Readback Registers1
Address (User Sub Map)
Signal Name
Register Location
Dec
Hex
GS_VPS_PDC_UTC_BYTE_0 [7:0]
VDP_GS_VPS_PDC_UTC_0 [7:0]
132d
0x84
GS_VPS_PDC_UTC_BYTE_1 [7:0]
VDP_GS_VPS_PDC_UTC_1 [7:0]
133d
0x85
GS_VPS_PDC_UTC_BYTE_2 [7:0]
VDP_GS_VPS_PDC_UTC_2 [7:0]
134d
0x86
GS_VPS_PDC_UTC_BYTE_3 [7:0]
VDP_GS_VPS_PDC_UTC_3 [7:0]
135d
0x87
VPS_PDC_UTC_BYTE_4 [7:0]
VDP_VPS_PDC_UTC_4 [7:0]
136d
0x88
VPS_PDC_UTC_BYTE_5 [7:0]
VDP_VPS_PDC_UTC_5 [7:0]
137d
0x89
VPS_PDC_UTC_BYTE_6 [7:0]
VDP_VPS_PDC_UTC_6 [7:0]
138d
0x8A
VPS_PDC_UTC_BYTE_7 [7:0]
VDP_VPS_PDC_UTC_7 [7:0]
139d
0x8B
VPS_PDC_UTC_BYTE_8 [7:0]
VDP_VPS_PDC_UTC_8 [7:0]
140d
0x8C
VPS_PDC_UTC_BYTE_9 [7:0]
VDP_VPS_PDC_UTC_9 [7:0]
141d
0x8D
VPS_PDC_UTC_BYTE_10 [7:0]
VDP_VPS_PDC_UTC_10 [7:0]
142d
0x8E
VPS_PDC_UTC_BYTE_11 [7:0]
VDP_VPS_PDC_UTC_11 [7:0]
143d
0x8F
VPS_PDC_UTC_BYTE_12 [7:0]
VDP_VPS_PDC_UTC_12 [7:0]
144d
0x90
1 The register is a readback register; the default value does not apply.
PDC/UTC
PDC and UTC are data transmitted through Teletext Packet 8/30
Format 2 (Magazine 8, Row 30, Design Code 2 or 3), and Packet 8/30
Format 1 (Magazine 8, Row 30, Design Code 0 or 1). Therefore, if
PDC or UTC data is to be read through I2C, the corresponding
teletext standard (WST or PAL System B) should be decoded by
VDP. The whole teletext decoded packet is output on the ancillary
data stream. The user can look for the magazine number, row
number, and design code and qualify the data as PDC, UTC, or
neither of these.
If PDC/UTC packets are identified, Byte 0 to Byte 12 are
updated to the GS_VPS_PDC_UTC_0 to VPS_PDC_UTC_12
registers and the GS_PDC_VPS_UTC_AVL bit is set. The full
packet data is also available in the ancillary data format.
Note that the data available in the I2C register depends on the
status of the WST_PKT_DECODE_DISABLE bit (Bit 3,
Subaddress 0x60, user sub map).
VBI System 2
The user can choose to use an alternative VBI data slicer, called
VBI System 2. This data slicer is used to decode Gemstar and
closed caption VBI signals only.
Using this system, the Gemstar data is only available in the ancillary
data stream. A special mode enables one line of data to be read
back via I2C. For more information, contact an Analog Devices
representative for an engineering note on ADV7184 VBI
processing.
Gemstar Data Recovery
The Gemstar-compatible data recovery block (GSCD) supports
Gemstar 1× and Gemstar 2× data transmissions. In addition, it
can serve as a decoder for closed captioning. Gemstar-compatible
data transmissions can occur only in NTSC mode. Closed
caption data can be decoded in both PAL and NTSC modes.
The block is configured via the I2C in the following ways:
GDECEL [15:0] allows data recovery for selected video
lines on even fields to be enabled and disabled.
GDECOL [15:0] enables data recovery for selected lines for
odd fields.
GDECAD configures the way in which data is embedded
in the video data stream.
The recovered data is not available through I2C, but is inserted
into the horizontal blanking period of an ITU-R BT.656-com-
patible data stream. The data format is intended to comply
with the ITU-R BT.1364 recommendation by the International
Telecommunications Union. For more information, visit the
International Telecommunications Union’s website. See Figure 43.
GDE_SEL_OLD_ADF, Address 0x4C [3], User Map
The ADV7184 has an ancillary data output block that can be used
by the VDP data slicer and the VBI System 2 data slicer. The new
ancillary data formatter is used by setting GDE_SEL_OLD_ADF to
0 (this is the default setting). If this bit is set low, refer to Table 71
and Table 72 for information about how the data is packaged in
the ancillary data stream.
To use the old ancillary data formatter (to be backward com-
patible with the ADV7189B), set GDE_SEL_OLD_ADF to 1.
The ancillary data format in this section refers to the ADV7189B-
compatible ancillary data formatter.
0 (default)—Enables the new ancillary data system (for use with
VDP and VBI System 2).
1—Enables the old ancillary data system (for use with VBI
System 2 only; ADV7189B compatible).
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| ADV7186BBCZ | 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064 |
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