参数资料
型号: EK-V6-ML630-G-J
厂商: Xilinx Inc
文件页数: 63/65页
文件大小: 0K
描述: VIRTEX-6 HXT FPGA ML630 EVAL KIT
标准包装: 1
系列: Virtex® 6 HXT
类型: FPGA
适用于相关产品: Virtex?-6 XC6VHX565T
所含物品: 板,线缆,软件和文档
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Date
01/18/2010
02/09/2010
04/12/2010
05/11/2010
05/26/2010
07/16/2010
07/23/2010
07/30/2010
09/20/2010
10/18/2010
01/17/2011
Version
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
Description of Revisions
Changed absolute maximum ratings for both V IN and V TS in Table 1 . Added data to Table 3 . Added
data to Table 5 . Updated SSTL15 in Table 7 . Updated V OCM and V OD values in Table 8 . Added eFUSE
endurance Table 12 . Added values to V MGTREFCLK and V IN in Table 13, page 11 . Added values and
updated tables in the GTX Transceiver Specifications and GTH Transceiver Specifications sections.
Added Table 27 and Figure 4 . Revised parameters and values in Table 39 . Updated Table 40, page 23 .
Added data to Table 41 . Updated speed specification to v1.04 with appropriate changes to Table 42
and Table 43 including production release of the XC6VLX240T for -1 and -2 speed grades. Speed
specification changes and numerous updates also made to Table 44 , and Table 49 through Table 71 .
Added data to Table 73 and Table 74 .
Revised description of C IN in Table 3 . Clarified values in Table 5 . Fixed SDR LVDS unit error in
Added note 3 and update value of n in Table 3 . Clarified simultaneous power-down in Power-On Power
Supply Requirements . Updated external reference junction temperatures in Table 40 , Analog-to-Digital
Specifications . Updated speed specification to v1.05 with appropriate changes to Table 42 and
Table 43 including production release of the XC6VLX130T for -1 and -2 speed grades. Fixed note 4 in
Table 48 . Increased the -2 specification for F IDELAYCTRL_REF and clarified units for T IDELAYPAT_JIT in
Table 53 . Added note 1 to Table 62 .
Updated F RXREC in Table 22 . Revised F IDELAYCTRL_REF in Table 53 . Removed T RCKO_PARITY_ECC :
Clock CLK to ECCPARITY in standard ECC mode row in Table 57 . Added XC6VLX130T values to
Added XC6VLX195T data to Table 5 . Updated values in Table 22 including adding note 2 and note 3.
Updated speed specification to v1.06 with appropriate changes to Table 42 and Table 43 including
production release of the XC6VLX195T for -1 and -2 speed grades. Added XC6VLX195T values to
Changed Table 42 and Table 43 to production status on the -3 speed grade XC6VLX130T,
XC6VLX195T, and XC6VLX240T devices. Added XC6VHX250Tdata to Table 4 and Table 72 . Added
Note 6 to Table 64 .
Changed Table 42 and Table 43 to production status on the XC6VLX75T, XC6VLX365T, XC6VLX550T,
XC6VLX760, XC6VSX315T, and XC6VSX475T devices using ISE 12.2 software with speed
specification v1.08. Updated V CMOUTDC equation to MGTAVTT – D VPPOUT /4 in Table 17 . Updated
some -3, -2, -1 specifications in Table 65 through Table 72 . Added and updated -1L specifications to
Table 41 and for most switching characteristics tables.
Changed Table 42 and Table 43 to production status on the -1L speed grade for the XC6VLX130T,
XC6VLX195T, XC6VLX240T, XC6VLX365T, and XC6VLX550T devices using ISE 12.2 software with
current speed specifications. Also updated the speed specifications for XC6VLX75T, XC6VLX550T,
and XC6VSX315T. Updated V CCINT specifications for -1L speed grade industrial temperature range
devices in Table 2 .
In Table 32 , changed F GPLLMAX specification in -3 column from 5.951 to 5.591. In Table 40 , changed
F MAX for the DCLK from 250 MHz to 80 MHz.
The specification change in version 2.9, Table 40 is described in XCN10032 , Virtex-6 FPGA: GTX
Transceiver User Guide, Family Data Sheet (SYSMON DCLK), and JTAG ID Changes
In this version (2.10), -1L(I) data is added to Table 4 and clarified in Note 2. Changed Table 42 and
Table 43 to production status on the -1L speed grade XC6VLX75T, XC6VLX760, XC6VSX315T, and
XC6VSX475T devices using ISE 12.3 software with current speed specifications. Revised the
XC6VLX760 -1L speed specification for T PHMMCMGC in Table 69 and T PHMMCMCC in Table 70 .
Changed in Table 42 and Table 43 to production status on the XC6VHX250T devices using ISE 12.4
software with current speed specifications.
Added industrial temperature range (T j ) recommended specifications to Table 2 ; including specific
ranges for the -2I XC6VSX475T, XC6VLX550T, XC6VLX760, and XC6VHX565Tdevices. Added
note 3 to Table 36 and maximum total jitter values. Added note 4 to Table 37 and maximum sinusoidal
jitter values. Added note 2 to Table 43 . Revised F MAX descriptions in Table 57 and added note 12.
Added note 8 to F PFDMIN in Table 64 .
The following revisions are due to specification changes as described in XCN11009 , Virtex-6 FPGA:
Data Sheet, User Guides, and JTAG ID Updates .
In Table 59 : Configuration Switching Characteristics , page 49 , revised -1L specifications for T POR ,
F MCCK , F MCCKTOL , T SMCSCCK , T SMCCKW , F RBCCK , F TCK , F TCKB , T MCCKL , and T MCCKH . In Table 64 :
MMCM Specification , added bandwidth settings to F PFDMIN and added note 1.
DS152 (v3.6) March 18, 2014
Product Specification
63
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