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参数资料
| 型号： | HY5MS5B6LF-H |
| 厂商： | HYNIX SEMICONDUCTOR INC |
| 元件分类： | DRAM |
| 英文描述： | 16M X 16 DDR DRAM, 6.5 ns, PBGA60 |
| 封装： | 8 X 12 MM, 1 MM HEIGHT, 0.80 MM PITCH, FBGA-80 |
| 文件页数： | 50/60页 |
| 文件大小： | 676K |
| 代理商： | HY5MS5B6LF-H |
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Rev 0.2 / Oct. 2004
54
11Preliminary
Mobile DDR Memory 256Mbit (16Mx16bit)
Clock Stop Mode
Clock stop mode is a feature supported by Mobile DDR SDRAM devices. It reduces clock-related power consumption
during idle periods of the device.
Conditions: the Mobile DDR SDRAM supports clock stop in case:
●
The last access command (ACTIVE, READ, WRITE, PRECHARGE, AUTO REFRESH or MODE REGISTER SET) has
executed to completion, including any data-out during read bursts; the number of required clock pulses per access
command depends on the device's AC timing parameters and the clock frequency;
●
The related timing condition (tRCD, tWR, tRP, tRFC, tMRD) has been met;
●
CKE is held HIGH.
When all conditions have been met, the device is either in ''idle'' or ''row active'' state, and clock stop mode may be
entered with CK held LOW and CK held HIGH. Clock stop mode is exited when the clock is restarted. NOPs command
have to be issued for at least one clock cycle before the next access command may be applied. Additional clock pulses
might be required depending on the system characteristics.
Figure1 illustrates the clock stop mode:
●
Initially the device is in clock stop mode;
●
The clock is restarted with the rising edge of T0 and a NOP on the command inputs;
●
With T
1 a valid access command is latched; this command is followed by NOP commands in order to allow for clock
stop as soon as this access command has completed;
●
T
n is the last clock pulse required by the access command latched with T1.
●
The timing condition of this access command is met with the completion of T
n; therefore Tn is the last clock pulse
required by this command and the clock is then stopped.
Figure 3. Clock Stop Mode
CK
ADD
CMD
NOP
Valide
Clock
Stopped
Exit Clock
Stop Mode
Valid
Command
Enter Clock
Stop Mode
Don't Care
(High-Z)
CK
CM
D
T
0
T
1
T
2
T
n
CKE
DQ,
DQS
Timing Condition
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HY5MS7B2BLFP-H | 制造商:SK Hynix Inc 功能描述: |
| HY5N50FT | 制造商:HY 制造商全称:HY ELECTRONIC CORP. 功能描述:500V / 5A N-Channel Enhancement Mode MOSFET |
| HY5N50T | 制造商:HY 制造商全称:HY ELECTRONIC CORP. 功能描述:500V / 5A N-Channel Enhancement Mode MOSFET |
| HY5P | 制造商:LEM 制造商全称:LEM 功能描述:Current Transducers HY 5 to 25-P/SP1 |
| HY5-P | 制造商:LEM Holdings SSA 功能描述:CURRENT TRANSFORMER, HY 5-P |
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