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参数资料
| 型号： | IBM37RGB524CF17A |
| 元件分类： | 显示控制器 |
| 英文描述： | 1600 X 1280 PIXELS PALETTE-DAC DSPL CTLR, PQFP144 |
| 封装： | QFP-144 |
| 文件页数： | 19/72页 |
| 文件大小： | 509K |
| 代理商： | IBM37RGB524CF17A |
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20
March 17, 1995
RGB524
IBM
5.5
Cursor Position
The Cursor X Low, Cursor X High, Cursor Y Low, and
Cursor Y High registers specify the position of the cur-
sor (the cursor hot spot) on the screen.
The X and Y positions are specied as signed numbers
in two’s complement format. The High and Low pairs
yield 16-bit position registers, of which 12 bits plus a
sign bit are used.
The hardware automatically extends the sign bit into
the unused bit positions of the position registers. The
valid X and Y ranges are -4096 to +4095.
The X and Y screen coordinates are for non-border dis-
play pixels. (0,0) is the upper left corner pixel of the
screen that is not in the border area. The X value
increases positively left-to-right, and the Y value
increases positively top-to-bottom. Negative X values
are to the left of the non-border display area and nega-
tive Y values are above the top of the non-border display
area.
The cursor is clipped by the edges of the screen if there
is no border, or by the border if a border is used. For
example, if the hot spot is (0,0) the full cursor will be dis-
played in the upper left corner if the X position is +0 and
the Y position is +0. If the X value is changed to -1
(0xffff) only columns 1 through 31 of the cursor will be
displayed. If the X value is -31 (0xffe1) only column 31 of
the cursor will be displayed. If the X value is more nega-
tive than -31 the cursor will not be displayed.
5.6
Interlace
The selection of cursor rows for display is changed if
interlace mode is specied. This is controlled with the
INTL MODE bit of the Miscellaneous Control 2 register.
In non-interlaced mode, the cursor rows are displayed
sequentially, starting with the rst non-clipped row to
be displayed based on the Y position and Y Hot Spot reg-
ister contents.
When interlaced mode is specied, the ODD/EVEN sig-
nal (actually BORDER/OE, see below) is used to deter-
mine if odd or even scan lines are being displayed. If
ODD/EVEN is low (even eld), the rst non-clipped cur-
sor row that falls on an even scan line is displayed. Sim-
ilarly if ODD/EVEN is high (odd eld), the rst non-
clipped cursor row that falls on an odd scan line is dis-
played. In either case, if the rst cursor line displayed is
an even-numbered cursor row (as determined by Y Posi-
tion and Y Hot Spot) then successive even-numbered
cursor rows will be displayed during that eld. If the
rst cursor line displayed is an odd-numbered cursor
row then successive odd-numbered cursor rows will be
displayed during that eld.
ODD/EVEN should only change during vertical blank-
ing time for proper cursor display.
The ODD/EVEN input is actually the shared input pin
BORDER/OE, where the usage of the pin is determined
by the BRDR/INTL of the Miscellaneous Control 2 regis-
ter. BRDR/INTL must be set to INTL for using the cur-
sor with interlaced mode. If BRDR/INT is set as BRDR
then the INTL MODE bit will be ignored (non-interlaced
mode will be used).
5.7
Cursor Update and Display
5.7.1
Position
Writing any of the Cursor X Low, Cursor X High, or Cur-
sor Y Low registers will not affect the position of the cur-
sor on the screen. When the Cursor Y High register is
written, the X and Y positions are captured in a second
set of registers.
When vertical blanking is detected (see 4.3 “Vertical
Blanking” on page 16), the “captured” X and Y positions
are sampled. The sampled position is saved until it is re-
sampled on the next vertical blanking time. Between
vertical blanking times the sampled position is used,
along with the Cursor Hot Spot, to calculate which pix-
els of the cursor are used and where they are displayed
on the screen.
When INTL MODE is set the ODD/EVEN signal is
examined at the end of vertical blanking to determine if
only even or only odd rows will be displayed.
5.7.2
Controls
When vertical blanking is detected the Cursor Control
register is sampled along with the X and Y position reg-
isters. This allows the cursor to be toggled on and off on
a frame-by-frame basis with the CURSOR MODE bits,
and if the cursor is 32 x 3 2, it allows toggling among the
four slots on a frame-by-frame basis using the SMLC
SLOT bits.
Note that in interlace mode the sampling is on a eld-
by-eld basis. Also, since the PIX ORDER and CURS
SIZE bits are also sampled these functions will only
change when vertical blanking is detected.
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相关代理商/技术参数 |
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|---|---|
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