参数资料
型号: M37902FCCHP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数: 119/143页
文件大小: 1148K
代理商: M37902FCCHP
77
M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Trigger
A-D conversion can be started by an internal trigger or by an exter-
nal trigger.
An internal trigger is selected when bit 5 of A-D control register 0 is
“0” and an external trigger is selected when it is “1”. When trigger is
selected, A-D conversion is started when bit 6 (A-D conversion start
bit) is set to “1.”
When an external trigger is selected, the polarity of a trigger input
can be selected by bit 5 of the A-D control register 1. When bit 5 =
“0”, a falling edge is selected, and when bit 5 = “1”, a rising edge is
selected.
A-D conversion starts when the A-D conversion start bit is “1” and the
______
ADTRG input changes from “H” to “L” (or “L” to “H.”) In this case, the
pins that can be used for A-D conversion are AN0 to AN6 because the
______
ADTRG pin is multiplexed with an analog voltage input pin, AN7. If an
Fig. 78 Bit configuration of A-D control register 0
external trigger is selected, even when the A-D conversion is com-
pleted, the A-D conversion start bit keeps “1”. Also, a retrigger can be
available even when A-D conversion is in progress.
VREF connection
Whether to connect the reference voltage input (VREF) with the resis-
tor ladder network or not depends on bit 6 of the A-D control register
1. The VREF pin is connected when bit 6 is “0” and is disconnected
when bit 6 is “1” (High impedance state).
When A-D conversion is not performed, current from the VREF pin to
the resistor ladder network can be cut off by disconnecting resistor
ladder network from the VREF pin.
Before starting A-D conversion, wait for 1
s or more after clearing
bit 6 to “0”.
A-D control register 0
Notes 1: Ignored in the single sweep and repeat sweep modes. (Each of these bits may be “0” or “1”.)
2: When using the AN4 pin, be sure to clear the INT3 pin select bit (bit 5 at address 9416) to “0”.
3: When using the AN5 pin, be sure to clear the INT4 pin select bit (bit 6 at address 9416) to “0”.
4: When using the AN6 pin, be sure to clear the D-A0 output enable bit (bit 0 at address 9616) to “0” (output disabled).
5: When using the AN7 pin, be sure to clear both of the INT2 pin select bit (bit 4 at address 9416) and the D-A1
output enable bit (bit 1 at address 9616) to “0”.
6: When using an external trigger, be sure to clear the INT2 pin select bit (bit 4 at address 9416) and D-A1 output
enable bit (bit 1 at address 9616) to “0”.
7: For writing to this bit, use the MOVM (MOVMB) instruction, or the STA (STAB, STAD) instruction.
8: Rewriting to each bit of the A-D control register 0 (except for bit 6) must be performed while A-D conversion is stopped.
Address
1E16
76543210
Analog input select bits (Note 1)
(Valid in the one-shot and repeat modes.)
0 0 0 : Select AN0
0 0 1 : Select AN1
0 1 0 : Select AN2
0 1 1 : Select AN3
1 0 0 : Select AN4 (Note 2)
1 0 1 : Select AN5 (Note 3)
1 1 0 : Select AN6 (Note 4)
1 1 1 : Select AN7 (Note 5)
A-D operation mode select bits
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode
Trigger select bit
0 : Internal trigger
1 : External trigger due to ADTRG input (Note 6)
A-D conversion start bit (Note 7)
0 : Stop A-D conversion
1 : Start A-D conversion
A-D conversion frequency (
φAD) select bit 0
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