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参数资料
| 型号： | M37902FCCHP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 42/143页 |
| 文件大小： | 1148K |
| 代理商： | M37902FCCHP |
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Corrections and Supplementary Explanation for M37902FxC Datasheet (REV.B) NO.4
Page
Error
Correction
(4/11)
b31
b0
DB
Data buffer
b31
b0
DQ
Data buffer
Page 18,
Fig. 11
5
Page 26,
Fig. 18,
Notes 1
Notes 1: The number of bus cycles is determi-
ned by the following bits:
Notes 1: The bus cycle type is determined by the
following bits:
Page 31,
Right column
Line 5
. Therefore, ports P0 or P4, P10, P11 fun-
ction as I/O pins for the address bus,
. Therefore, ports P0 to P4, P10, P11 fun-
ction as I/O pins for the address bus,
Mode
(Note 1)
Pin MD0
Processor mode
(Note 2)
Page 33,
Table 5
Mode
(Note 1)
Pin MD0
Processor mode bits
(Note 2)
Page 35,
Fig. 24,
Note
Notes 1: While VSS , bit 1 is cleared to “0”.
While VCC , bit 1 is set to “1” at reset.
(Fixed to “1”.)
Notes 1: While VSS , this bit’s state is cleared
to “0” at reset. While VCC , this bit’s
state is set to “1” at reset. (Fixed to “1”.)
3: While VSS , bit 7 is cleared to “0”.
While VCC , bit 7 is set to “1” at reset.
3: While VSS , this bit’s state is cleared
to “0” at reset. While VCC , this bit’s
state is set to “1” at reset.
5
4: While VSS , these bits are cleared to “0”. While
VCC , on the other hand, these bits are set to “1”.
4: While VSS , each of these bits is “0” at reset. While
VCC , on the other hand, each of these bits is “1”
at reset.
Data buffer
Temporarity stores data which has been ,
and external areas by the BIU or which is to be
writeen to internal memory, .
Temporarily stores data which has been ,
and external areas by the BIU; or temporarily
stores data which is to be written to internal
memory, .
5
Page 18,
Table 1
Instruction
queue buffer
Temporarity stores an instruction which .
Temporarily stores an instruction which .
Processor mode register 1
10
2
43
5
6
7
Recovery-cycle-insert select bit
Internal ROM bus cycle select
bit (Note 6)
Page 36,
Fig. 25
5
Processor mode register 1
10
2
43
5
6
7
Recovery-cycle-insert select bit
(Note 6)
Internal ROM bus cycle select
bit (Note 7)
2: After reset, this bit’s contents can be switched only
once. During the software execution, be sure not to
switch this bit’s contents.
2: After reset, this bit can be set only once. During the
software execution, be sure not to change this bit.
5: In the memory expansion or microprocessor mode, if
this bit’s contents is switched from “1” to “0”, this bit
will be cleared to “0”. After this clearance, this bit
cannot return to “1”. If it is necessary to set this bit to
“1”, be sure to reset the microcomputer.
5: After reset, these bits can be set to “1” only once.
Once these bits have been cleared to “0” from “1”,
they cannot be set to “1” again. (Fixed to “0”.)
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相关代理商/技术参数 |
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|---|---|
| M37902FGCGP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37902FGCHP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37902FJCHP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37903S4CHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:16-BIT CMOS MICROCOMPUTER |
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