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参数资料
型号： M37902FCCHP
元件分类： 微控制器/微处理器
英文描述： 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100
封装： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数： 15/143页
文件大小： 1148K
代理商： M37902FCCHP
111
MITSUBISHI MICROCOMPUTERS
M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Erase All Unlocked Block Command (A716/D016)
Writing command code “A716” at the 1st bus cycle and writing verify
command code “D016” at the subsequent 2nd bus cycle initiate the
continuous block erase (chip erase) operations for all the blocks.
The completion of the chip erase operation, as well as of the block
erase operation, is verified by a read of the status register or a read
of the flash memory control register. The result of the automatic
erase operation is also reported by a read of the status register.
During the automatic erase operation (when the RY/BY status bit =
“0”), writing of commands and access to the flash memory must not
be performed.
When the lock bit invalidity select bit = “1”, all the blocks are erased
regardless of the status of their lock bits. When the lock bit invalidity
select bit = “0”, on the contrary, the status of each lock bit becomes
valid, so only the blocks in the unlocked state (lock bit = “1”) are
erased.
Lock Bit Programming Command (7716/D016)
By writing of command code “7716” at the 1st bus cycle and writing
of verify command code “D016” and the block’s maximum address
(Note that address A0 = “0”.) at the subsequent 2nd bus cycle, “0”
(the locked state) is written into the lock bit of the specified block.
Figure 118 shows an example of the lock bit programming flowchart.
The status of the lock bit can be read out by the read lock bit status
command.
The completion of the lock bit programming operation, as well as of
the page programming operation, is verified by a read of the status
register or a read of the flash memory control register.
For details of the lock bit’s function and the method of reset, refer to
the section on the data protect function.
Read Lock Bit Status Command (7116)
By writing of command code “7116” at the 1st bus cycle and writing of
the block’s maximum address (Note that address A0 = “0”.) at the
subsequent 2nd bus cycle, the status of the lock bit of the specified
block is output to the data bus (D6).
Figure 119 shows an example of the read lock bit programming flowchart.
Data Protect Function (Block Lock)
Each block is implemented with a nonvolatile lock bit to protect the
block from erasing/programming (block lock). A “0” (the locked state)
can be written to a lock bit using the lock bit programming command,
and the lock bit of each block can be read out by using the read lock
bit status command.
Whether a block lock is valid or invalid is determined by the status of
the lock bit and the lock bit invalidity select bit of the flash memory
control register.
(1) When the lock bit invalidity select bit = “0”, a lock bit determines
whether to lock or unlock the corresponding block. A block with
its lock bit = “0” is locked and inhibited from erasing and pro-
gramming. On the other hand, a block with its lock bit = “1” re-
mains unlocked and allows to be erased/programmed.
(2) When the lock bit invalidity select bit = “1”, all the blocks are un-
locked and allows to be erased/programmed regardless of the
values of their lock bits. In this case, a lock bit with a value “0”
(the locked state) is set to “1” (the unlocked state) after
completion of the erase operation, and the locked state by the
lock bit is terminated.
To perform erase or programming, be sure to do one of the following.
By executing the read lock bit status command, verify that the lock
of the target block is invalid.
Set the lock bit invalidity select bit to “1” to invalidate the lock.
When the block erase or programming is performed with the lock
valid, the erase status bit (SR.5) and programming status bit (SR.4)
are set to “1” (terminated by error).
Status Register
The status register is used to indicate what the status of the write
state machine (WSM) operation is and whether the programming/
erase operation has been completed normally or terminated by an
error. By writing the read status register command (7016), the con-
tents of the status register can be read out; by writing the clear sta-
tus register command (5016), the contents of the status register can
be cleared.
Table 21 lists the definition of each bit of the status register.
The status register outputs “8016” after reset is removed.
The status of each bit is described below.
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