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参数资料
| 型号： | M37902FCCHP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 123/143页 |
| 文件大小： | 1148K |
| 代理商： | M37902FCCHP |
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M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
80
D-A CONVERTER
Three independent D-A converters are included in this microcom-
puter, and each D-A converter adopts an 8-bit R-2R method. Figure
80 shows the block diagram of the D-A converter, Figure 81 shows
the bit configuration of the A-D control register 1, and Figure 82
shows the bit configuration of the D-A control register.
D-A conversion is performed by writing a value to the corresponding
D-A register i. Whether to output the analog voltage or not is deter-
mined by bits 0 to 2 of the D-A control register. When any of bits 0 to
2 = “1”, the corresponding pin (D-A0 to D-A2) outputs the analog volt-
age.
This analog voltage (V) is determined according to value n. (“n” =
decimal number. This has been set in the D-A register.)
V = VREF n/256 (n = 0 to 255)
VREF : Reference voltage
The contents of the corresponding D-A output enable bit and D-A
register are cleared to “0” at reset. Whether to connect the reference
voltage input (VREF) with the ladder network or not depends on bit 6
of the A-D control register 1. Pin VREF is connected with the ladder
network when bit 6 = “0” and is disconnected when bit 6 = “1” (high
impedance state). When not performing the A-D or D-A conversion,
current from pin VREF to the ladder network can be cut off by discon-
necting ladder network from pin VREF.
Before starting A-D or D-A conversion, be sure to clear bit 6 to “0”,
and then, insert a waiting time of 1 s or more.
An external buffer is necessary when connecting a low impedance
load with the D-A converter. It is because that a D-A output pin
doesn’t include a buffer.
Pin D-Ai is multiplexed with I/O port pins, analog input pins, serial
I/O pins, and external interrupt input pins. When a D-Ai output enable
bit = “1” (in other words, output is enabled.), however, the corre-
sponding pin cannot function as another I/O pin, which is multiplexed
Fig. 80 Block diagram of D-A converter
Fig. 81 Bit configuration of A-D control register 1
Note: When bit 6 has been cleared to “0” from “1”, insert a waiting time
of 1
s or more, and then, start the D-A or A-D conversion.
Not used for D-A converter.
VREF connection select bit (Note)
0: Connected.
1: Disconnected.
A-D control register 1
Address
1F16
76543210
AVSS
VREF
R-2R ladder
network
D-A register i (i = 0 to 2)
(Addresses 9816 to 9A16)
Pin D-Ai
D-Ai output enable bit
VREF connection
select bit
0
1
Data bus
Fig. 82 Bit configuration of D-A control register
D-A0 output enable bit (Note)
0: Output is disabled.
1: Output is enabled.
D-A1 output enable bit (Note)
0: Output is disabled.
1: Output is enabled.
D-A2 output enable bit (Note)
0: Output is disabled.
1: Output is enabled.
76543210
D-A control register
Address
9616
Note: Pin D-Ai is multiplexed with I/O port pins, analog input pins, serial
I/O pins, and external interrupt input pins. When a D-Ai output
enable bit = “1” (in other words, output is enabled.), however, the
corresponding pin cannot function as another I/O pin, which is
multiplexed with pin D-Ai.
with pin D-Ai.
Also, when not using the D-A converter, be sure to clear the contents
of the corresponding D-A output enable bit and D-A register to “0”.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M37902FGCGP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37902FGCHP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37902FJCHP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M37903S4CHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:16-BIT CMOS MICROCOMPUTER |
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