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参数资料
| 型号： | PF38F3352LLZDQ0 |
| 厂商： | INTEL CORP |
| 元件分类： | 存储器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA88 |
| 封装： | 11 X 13 MM, SCSP-88 |
| 文件页数： | 14/54页 |
| 文件大小： | 966K |
| 代理商： | PF38F3352LLZDQ0 |
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768-Mbit LVQ Family with Asynchronous Static RAM
Datasheet
21
5.0
Maximum Ratings and Operating Conditions
5.1
Absolute Maximum Ratings
Warning:
Stressing the device beyond the “Absolute Maximum Ratings” may cause permanent damage.
These are stress ratings only. Operation beyond the “Operating Conditions” is not recommended
and extended exposure beyond the “Operating Conditions” may affect device reliability.
NOTICE: This document contains information available at the time of its release. The specifications are
subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet
before finalizing a design
.
Table 3.
Absolute Maximum Ratings
Parameter
MIN
MAX
Unit
Notes
Temperature under Bias Expanded
–25
+85
°C
5
Storage Temperature
–55
+125
°C
5
Voltage On Any Signal (except F-VCC,VCCQ, F-VPP,
S-VCC,and P-VCC)
–0.5
+3.6
V
1,5
F-VCC Voltage
–0.2
+2.50
V
1,5
VCCQ,P-VCC and S-VCC Voltage
1.8V I/O
–0.2
+2.50
V
1,5
3.0 V I/O
–0.2
+3.60
V
1,5
F-VPP Voltage
–0.2
+10.0
V
1,2,3,5
ISH Output Short Circuit Current
–
100
mA
4,5
NOTES:
1. All specified voltages are relative to VSS. Minimum DC voltage is –0.5 V on input/output signals, –0.2 V
on VCCQ and F-VPP signals. During transitions, this level may overshoot to –2.0 V for periods < 20 ns.
Maximum DC voltage on F-VCC is VCC + 0.5 V, which during transitions may overshoot to F-Vcc +2.0 V
for periods <20 ns. Maximum DC voltage on input/output signals and VCCQ is VCCQ +0.5 V, which during
transitions may overshoot to VCCQ + 2.0V for periods < 20ns.
2. Maximum DC voltage on F-VPP may overshoot to +10.0 V for periods < 20 ns.
3. Flash program/erase voltage (F-VPP) is typically 1.7 V-2.0 V. F-Vpp can be connected to 8.50 V - 9.50 V
for 1000 cycles on main blocks and 2500 cycles on parameter blocks, or for 80 hours maximum total.
Operation with 9.0 V program/erase voltage may reduce flash block cycling capability.
4. Output shorted for no more than one second. No more than one output shorted at a time.
5. Absolute DC specifications applies to each flash and RAM die in the SCSP device.
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