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| 型号： | PF38F3352LLZDQ0 |
| 厂商： | INTEL CORP |
| 元件分类： | 存储器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA88 |
| 封装： | 11 X 13 MM, SCSP-88 |
| 文件页数： | 16/54页 |
| 文件大小： | 966K |
| 代理商： | PF38F3352LLZDQ0 |
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768-Mbit LVQ Family with Asynchronous Static RAM
Datasheet
23
6.0
Electrical Specifications
6.1
DC Current Characteristics
The DC current characteristics referenced in this document are for individual flash and RAM die in
the SCSP device. The total device current is determined by sum of the active and inactive currents
of each flash and RAM die in the SCSP device.
Note:
Refer to the latest revision of the Intel StrataFlash
Wireless Memory System (LV18/LV30 SCSP;
1024-Mbit LV Family Datasheet (order number 253854) for flash DC characteristics not included
in this document.
NOTICE: Individual DC Characteristics of all dies in a SCSP device need to be considered
accordingly, depending on the SCSP device stacked combinations and operations.
Table 5.
SRAM DC Characteristics
Parameter
Description
Test Conditions
3.0 V SRAM
Unit
MIN
MAX
S-VCC
Voltage Range
–
2.7
3.3
V
VDR
S-VCC for Data Retention
–
1.5
–
V
ICC
Operating Current at minimum cycle
time
IIO =0 mA
–
50
mA
ICC2
Operating Current at maximum
cycle time (1
s)
IIO =0 mA
–
10
mA
ISB
Standby Current
S-CS1#
≥ S-V
CC-0.2V
or S-CS2
≤ V
SS+0.2V
Address/Data toggling at minimum
cycle time
–25
A
IDR
Current in Data Retention mode
S-VCC =1.5 V
–
12
A
VOH
Output High Voltage
IOH =-100 A
S-VCC -
0.1
–V
VOL
Output Low Voltage
IOL =100 A,
VCCMIN
-0.1
0.1
V
VIH
Input High Voltage
–
S-VCC -
0.4
S-VCC+
0.2
V
VIL
Input Low Voltage
–
-0.2
0.6
V
*IIL
Input Leakage Current
-0.2 < VIN <S-VCC+0.2 V
-1
+1
A
*ILDR
Input Leakage Current in Data
Retention Mode
-0.2 < VIN <S-VCC+0.2 V
S-VCC =VDR
-1
+1
A
NOTE:
* Input leakage currents include Hi-Z output leakage for bi-directional buffers with tri-state outputs.
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