参数资料
型号: PF38F3352LLZDQ0
厂商: INTEL CORP
元件分类: 存储器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA88
封装: 11 X 13 MM, SCSP-88
文件页数: 19/54页
文件大小: 966K
代理商: PF38F3352LLZDQ0
768-Mbit LVQ Family with Asynchronous Static RAM
26
Datasheet
Table 8.
SRAM AC Read Specifications
#
Symbol
Parameter
MIN
MAX
Unit
Notes
R1
tRC
Read Cycle Time
70
ns
R2
tAA
Address to Output Delay
70
ns
R3
tCO1
S-CS1# to Output Delay
70
ns
R3
tCO2
S-CS2 to Output Delay
70
ns
R4
tOE
R-OE# to Output Delay
35
ns
R5
tBA
R-UB#, R-LB# to Output Delay
70
ns
R6
tLZ
S-CS1# or S-CS2 to Output in Low-Z
5
ns
1,2
R7
tOLZ
R-OE# to Output in Low-Z
0
ns
1
R8
tHZ
S-CS1# or S-CS2 to Output in High-Z
0
25
ns
1,2,3
R9
tOHZ
R-OE#toOutput inHigh-Z
0
25
ns
1,3
R10
tOH
Output Hold (from Address, S-CS1#,
S-CS2, or R-OE# Change, whichever
Occurs First)
0–
ns
R11
tBLZ
R-UB#, R-LB# to Output in Low-Z
0
ns
1
R12
tBHZ
R-UB#, R-LB# to Output in High-Z
0
25
ns
1
NOTES:
1. Sampled, not 100% tested.
2. At any given temperature and voltage condition, tHZ (MAX) islessthan tLZ (MAX) for a given device and
from device-to-device interconnection.
3. Timings of tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions
and are not referenced to output voltage levels.
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