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参数资料
| 型号： | S71PL129JC0BFW9Z2 |
| 厂商： | SPANSION LLC |
| 元件分类： | 存储器 |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA64 |
| 封装： | 8 X 11.60 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-64 |
| 文件页数： | 70/153页 |
| 文件大小： | 3651K |
| 代理商： | S71PL129JC0BFW9Z2 |
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October 28, 2005 S71PL129Jxx_00_A8
S71PL129JC0/S71PL129JB0/S71PL129JA0
21
Advance
Informatio n
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE1# or CE#2 to VIL, and OE# to VIH.
The device features an Unlock Bypass mode to facilitate faster programming.
Once a bank enters the Unlock Bypass mode, only two write cycles are required
to program a word, instead of four. “Word Program Command Sequence” on page
46 has details on programming data to the device using both standard and Unlock
Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 4 indicates the set of address space that each sector occupies. A “bank ad-
dress” is the set of address bits required to uniquely select a bank. Similarly, a
“sector address” refers to the address bits required to uniquely select a sector.
“Command Definitions” on page 45 has details on erasing a sector or the entire
chip, or suspending/resuming the erase operation.
ICC2 in the DC Characteristics table represents the active current specification for
the write mode. See the timing specification tables and timing diagrams in “Re-
set” for write operations.
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This
function is primarily intended to allow faster manufacturing throughput at the
factory.
If the system asserts VHH on this pin, the device automatically enters the afore-
mentioned Unlock Bypass mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the time required for program
operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing VHH from the WP#/ACC pin re-
turns the device to normal operation. Note that VHH must not be asserted on
WP#/ACC for operations other than accelerated programming, or device damage
may result. In addition, the WP#/ACC pin should be raised to VCC when not in
use. That is, the WP#/ACC pin should not be left floating or unconnected; incon-
sistent behavior of the device may result.
Autoselect Functions
If the system writes the autoselect command sequence, the device enters the au-
toselect mode. The system can then read autoselect codes from the internal
register (which is separate from the memory array) on DQ15–DQ0. Standard
read cycle timings apply in this mode. See “Secured Silicon Sector Addresses” on
page 29 and “Autoselect Command Sequence” on page 46 for more information.
Standby Mode
When the system is not reading or writing to the device, it can place the device
in the standby mode. In this mode, current consumption is greatly reduced, and
the outputs are placed in the high impedance state, independent of the OE#
input.
Bank 2A
1
0
00, 01, 10
Bank 2B
1
0
11
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S71PL129JC0BFW9Z3 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory |
| S71PL129N | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/128兆位(16/8/8米x16位元)的CMOS 3.0电压只有同时读/写,页面模式闪存 |
| S71PL129NB0 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit MCPs |
| S71PL129NB0HAW5B0 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit MCPs |
| S71PL129NB0HAW5B2 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit MCPs |
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