参数资料
型号: SDED7-256M-N9T
厂商: SANDISK CORP
元件分类: 存储控制器/管理单元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA115
封装: 12 X 9 MM, 1.20 MM HEIGHT, FBGA-115
文件页数: 40/87页
文件大小: 1675K
代理商: SDED7-256M-N9T
Rev. 1.2
mDOC H3 Registers
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
45
92-DS-1205-10
1: active low
DMA_EN
DMA enable bit:
0: DMARQ# is disabled
1: DMARQ# is enabled
7.3.10 DMA Negation Register
Description:
This 16-bit register controls the negation of DMARQ# signal to the host.
Address (hex): 9418 (128KB window) / 1418 (8KB window)
Type:
Read / Write
Bit number
D15-D10
D9-D0
Read/Write
R
R/W
Bit name
RFU
DMA_PROG_NEG
Reset value
0
4
DMA_PROG_NEG
DMA programmable negation:
0-1023: Number of words in DRQ block before end of data transfer that
DMARQ# signal will be negated.
Note: DMA negation must be smaller than transfer size in words (16bit).
7.3.11 Software Lock Register
Description:
This 16-bit register implements the Sticky Lock functionality. After setting it,
protected-partitions can no longer be accessed, until the device is reset.
Address (hex): 9410 (128KB window) / 1410 (8KB window)
Type:
Read / Write
Bit number
D15-D1
D0
Read/Write
R
R/W
Bit name
RFU
SLOCK
Reset value
0
SLOCK
Sticky Lock bit.
0: Sticky Lock is not active
1: Sticky Lock is activated
This bit can only be set once by the host until device is reset.
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