参数资料
| 型号： | W25Q64FVSSIG |
| 厂商： | Winbond Electronics |
| 文件页数： | 10/89页 |
| 文件大小： | 0K |
| 描述： | IC SPI FLASH 64MBIT 8SOIC |
| 标准包装： | 90 |
| 系列： | SpiFlash® |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 64M（8M x 8） |
| 速度： | 80MHz |
| 接口： | SPI 串行 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
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W25Q64FV
3.9
Pin Descriptions
3.10 Chip Select (/CS)
The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high, the device is
deselected and the Serial Data Output (DO, or IO0, IO1, IO2, IO3) pins are at high impedance. When
deselected, the devices power consumption will be at standby levels unless an internal erase, program or
write status register cycle is in progress. When /CS is brought low, the device will be selected, power
consumption will increase to active levels and instructions can be written to and data read from the device.
After power-up, /CS must transition from high to low before a new instruction will be accepted. The /CS
input must track the VCC supply level at power-up and power-down (see “Write Protection” and figure 43).
If needed a pull-up resister on /CS can be used to accomplish this.
3.11 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3)
The W25Q64FV supports standard SPI, Dual SPI, Quad SPI and QPI operation. Standard SPI
instructions use the unidirectional DI (input) pin to serially write instructions, addresses or data to the
device on the rising edge of the Serial Clock (CLK) input pin. Standard SPI also uses the unidirectional
DO (output) to read data or status from the device on the falling edge of CLK.
Dual/Quad SPI and QPI instructions use the bidirectional IO pins to serially write instructions, addresses
or data to the device on the rising edge of CLK and read data or status from the device on the falling
edge of CLK. Quad SPI and QPI instructions require the non-volatile Quad Enable bit (QE) in Status
Register-2 to be set. When QE=1, the /WP pin becomes IO2 and /HOLD pin becomes IO3.
3.12 Write Protect (/WP)
The Write Protect (/WP) pin can be used to prevent the Status Registers from being written. Used in
conjunction with the Status Register’s Block Protect ( CMP, SEC, TB, BP2, BP1 and BP0) bits and Status
Register Protect (SRP) bits, a portion as small as a 4KB sector or the entire memory array can be
hardware protected. The /WP pin is active low. However, when the QE bit of Status Register-2 is set for
Quad I/O, the /WP pin function is not available since this pin is used for IO2. See figure 1a, 1b and 1c for
the pin configuration of Quad I/O operation.
3.13 HOLD (/HOLD)
The /HOLD pin allows the device to be paused while it is actively selected. When /HOLD is brought low,
while /CS is low, the DO pin will be at high impedance and signals on the DI and CLK pins will be ignored
(don’t care). When /HOLD is brought high, device operation can resume. The /HOLD function can be
useful when multiple devices are sharing the same SPI signals. The /HOLD pin is active low. When the
QE bit of Status Register-2 is set for Quad I/O, the /HOLD pin function is not available since this pin is
used for IO3. See figure 1a, 1b and 1c for the pin configuration of Quad I/O operation.
3.14 Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See SPI
Operations")
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q64FVSSIG TR | 制造商:Winbond Electronics Corp 功能描述:SPIFLASH, 64M-BIT, 4KB UNIFORM 制造商:Winbond Electronics Corp 功能描述:IC FLASH 64MBIT 104MHZ 8SOIC 制造商:Winbond 功能描述:SPIFLASH, 64M-BIT, 4KB UNIFORM |
| W25Q64FVSSIG/TRAY | 制造商:Winbond Electronics Corp 功能描述: |
| W25Q64FVSSIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q64FVTCIG | 制造商:Winbond Electronics Corp 功能描述:64MBIT SPI |
| W25Q64FVTCIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
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