参数资料
| 型号： | DS3105LN+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 51/124页 |
| 文件大小： | 0K |
| 描述： | IC TIMING LINE CARD 64-LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 160 |
| 类型： | 定时卡 IC，多路复用器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，Stratum，电信 |
| 输入： | CMOS，LVDS，LVPECL，TTL |
| 输出： | CMOS，LVDS，LVPECL，TTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 5:2 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 312.5MHz |
| 电源电压： | 1.62 V ~ 1.98 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
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DS3105
32
or free-run to locked mode, the phase difference between the new reference and the output is measured and fed
into the DPLL loop to absorb the input phase difference. After a PBO event, regardless of the input phase
difference, the output phase transient is less than or equal to 5ns.
Any time that PBO is enabled it can also be frozen at the current phase offset by setting MCR10:PBOFRZ = 1.
When PBO is frozen, the T0 DPLL ignores subsequent phase build-out events and maintains the current phase
offset between inputs and outputs.
Disabling PBO while the T0 DPLL is not in the free-run or holdover states (locking or locked) causes a phase
change on the output clocks while the DPLL switches to tracking the selected reference with zero degrees of phase
error. The rate of phase change on the output clocks depends on the DPLL bandwidth. Enabling PBO (which
includes unfreezing) while locking or locked also causes a PBO event.
7.7.7.2 PBO Phase Offset Adjustment
An uncertainty of up to 5ns is introduced each time a phase build-out event occurs. This uncertainty results in a
phase hit on the output. Over a large number of phase build-out events, the mean error should be zero. The
PBOFF register specifies a small fixed offset for each phase build-out event to skew the average error toward zero
and eliminate accumulation of phase shifts in one direction.
7.7.8 Input to Output (Manual) Phase Adjustment
When phase build-out is disabled (PBOEN = 0 in MCR10), the OFFSET registers can be used to adjust the phase
of the T0 DPLL output clocks with respect to the selected reference when locked. Output phase offset can be
adjusted over a
±200ns range in 6ps increments. This phase adjustment occurs in the feedback clock so that the
output clocks are adjusted to compensate. The rate of change is therefore a function of DPLL bandwidth. Simply
writing to the OFFSET registers with phase build-out disabled causes a change in the input to output phase, which
can be considered to be a delay adjustment. Changing the OFFSET adjustment while in free-run or holdover state
does not cause an output phase offset until it exits the state and enters one of the locking states.
7.7.9 Phase Recalibration
When a phase buildout occurs, either automatic or manual, the feedback frequency synthesizer does not get an
internal alignment signal to keep it aligned with the output dividers, and therefore the phase difference between
input and output can become incorrect. Setting the FSCR3:RECAL bit periodically causes a recalibration process
to be executed, which corrects any phase error that may have occurred.
During the recalibration process the device puts the DPLL into mini-holdover, internally ramps the phase offset to
zero, resets all clock dividers, ramps the phase offset to the value stored in the OFFSET registers, and switches
the DPLL out of mini-holdover. If the OFFSET registers are written during the recalibration process, the process
ramps the phase offset to the new offset value.
相关PDF资料 |
PDF描述 |
|---|---|
| DS3106LN+ | IC TIMING LINE CARD 64-LQFP |
| DS3231MZ+ | IC RTC I2C 8SOIC |
| DS3231SN#T&R | IC RTC W/TCXO 16-SOIC |
| DS3232MZ+ | IC RTC W/SRAM I2C 8SOIC |
| DS3232SN#T&R | IC RTC W/TCXO 20-SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS3105LN+ | 功能描述:计时器和支持产品 Line Card Timing IC RoHS:否 制造商:Micrel 类型:Standard 封装 / 箱体:SOT-23 内部定时器数量:1 电源电压-最大:18 V 电源电压-最小:2.7 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装:Reel |
| DS3106 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Line Card Timing IC |
| DS3106A10SL3S(621) | 制造商:Amphenol Corporation 功能描述: |
| DS3106A14S2S | 制造商:Amphenol Corporation 功能描述: |
| DS3106A14S2S(621) | 制造商:Amphenol Corporation 功能描述: |
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