参数资料
型号: EWIXP455ABT
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 266 MHz, RISC PROCESSOR, PBGA544
封装: LEAD FREE, PLASTIC, BGA-544
文件页数: 144/163页
文件大小: 1123K
代理商: EWIXP455ABT
Package Information
May 2005
Intel IXP45X and Intel IXP46X Product Line of Network Processors Datasheet
81
Document Number: 306261-002
Table 19.
Serial Peripheral Port Interface
Name
Power
on
Reset
Normal
After
Reset
Until
Software
Enables
Normal
After
Software
Enables
Type
Description
SSP_SCLK
Z
0
VO
O
SSP_SCLK is the serial bit clock used to control the timing of a transfer. SSP_SCLK can be
generated internally (Master mode) as defined by a control register bit internal to the IXP45X/IXP46X
network processors.
SSP_SFRM
Z
1
VO
O
SSP_SFRM is the serial frame indicator that indicates the beginning and the end of a serialized data
word. The SSP_SFRM can be generated internally (Master mode) or taken from an external source
(Slave mode) as defined by a control register bit internal to the IXP45X/IXP46X network processors.
This signal may be active low or active high depending upon the mode of operation.
Please refer to the Intel IXP45X and Intel IXP46X Product Line of Network Processors Developer’s
Manual
for additional details.
SSP_TXD
Z
0
VO
O
SSP_TXD is the Transmit data (serial data out) serialized data line. Sample length is a function of the
selected serial data sample size.
SSP_RXD
Z
VI
I
SSP_RXD is the Receive data (serial data in) serialized data line. Sample length is a function of the
selected serial data sample size.
Should be pulled high through a 10-K
resistor when not being utilized in the system.
SSP_EXTCLK
Z
VI
I
SSP_EXTCLK is an external clock which can be selected to replace the internal 3.6864 MHz clock.
The SSP_EXTCLK input is selected by setting various internal registers to appropriate values.
Should be pulled high through a 10-K
resistor when not being utilized in the system.
NOTE:
This table discusses all features supported on the Intel IXP45X and Intel IXP46X Product Line of Network Processors. For details on feature support listed by
processor, see Table 1 on page 14.
For a legend of the Type codes, see Table 10 on page 46.
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