Fusion 878A
3.0 Electrical Interfaces
PCI Video Decoder
3.5 I2C Serial EEPROM Interface
100600B
Conexant
3-23
3.5 I2C Serial EEPROM Interface
The external EEPROM must reside on the I2C bus (SDA, SCL). This interface
supports the IC’s equivalent to the 24C02 or 24C02A 2 k bit 5 V CMOS Serial
EEPROM. The 7-bit slave device address is 1010000. The EEPROM can be read
anytime using the I2C hardware or software modes. The read transaction
sequence is:
1.
START
2.
0xA0
3.
8-bit byte address
4.
START
5.
0xA1
6.
8-bit read data, followed by (master NACK &) STOP
Thus, a normal 2-byte write transaction without STOP followed by a 2-byte
read transaction allows random access to a data byte.
3.5.1 EEPROM Address Mapping
Fusion 878A can support one EEPROM (max 256 B), typically a single 24C02.
Re-map the 8-bit addressable physical memory space to an 8-bit logical address
space by inverting the address A[7:0], and subtracting 4. The 7-bit slave device
address is 1010_xxx where the xxx bits are (normally used for A[10:8]) set to
zero. The A2, A1, A0 pins on the 24C02 device should be tied low to match.
Re-mapping the address space in this way allows the subsystem IDs to be
stored at a fixed physical base address and have the read-only section precede the
read-writable section. The entire address range (rather than some sub-portion) is
inverted to maintain physical address continuity. The address translation applies
only when the hardware accesses subsystem IDs or vital product data. If SW uses
the I2C function to directly address the EEPROM, the actual physical address
must be used.
Table 3-6. External EEPROM Memory Map
Logical Address
Physical Address
24C02
251
0x00
Read/Write
...
124
0x7F
123
0x80
Read-Only
...
–40xFF