- 您现在的位置：买卖IC网 > PDF目录67592 > FUSION878A (CONEXANT SYSTEMS) COLOR SIGNAL DECODER, PQFP128 PDF资料下载
参数资料
| 型号： | FUSION878A |
| 厂商： | CONEXANT SYSTEMS |
| 元件分类： | 颜色信号转换 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封装： | PLASTIC, QFP-128 |
| 文件页数： | 151/180页 |
| 文件大小： | 2067K |
| 代理商： | FUSION878A |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页当前第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页
2.0 Functional Description
Fusion 878A
2.14 Multifunction Arbiter
PCI Video Decoder
2-48
Conexant
100600B
2.14 Multifunction Arbiter
An internal arbiter is necessary to determine whether the video or audio DMA
controller claims the PCI bus when a GNT is issued to the Fusion 878A. Only one
of the two functions may actually see the GNT active during any one PCI clock
cycle. This also ensures that only one function can park on the bus. The following
rules outline the arbitration algorithm. Internal signals REQ[0:1] and GNT[0:1]
are for the video Function 0 and the audio Function 1 respectively.
2.14.1 Normal PCI Mode
The PCI REQ signal is the logical OR of the incoming function requests. The
internal GNT[0:1] signals are gated asynchronously with GNT and demultiplexed
by the audio request signal. Thus the arbiter defaults to the video function at
power-up and parks there during no requests for bus access. This is desirable
since the video will request the bus more often. However, the audio will have
highest bus access priority. Thus, the audio will have first access to the bus even
when issuing a request after the video request but before the PCI external arbiter
has granted access to the Fusion 878A. Neither function can preempt the other
once on the bus. Emptying the entire video PCI FIFO onto the PCI bus is of very
short duration compared to the bus access latency that the audio PCI FIFO can
tolerate.
2.14.2 430FX Compatibility Mode
When using the 430FX PCI, the following rules will ensure compatibility:
1.
De assert REQ at the same time as asserting FRAME.
2.
Do not reassert REQ to request another bus transaction until after finishing
the previous transaction.
Since individual bus masters do not have direct control of REQ, a simple
logical OR of video and audio requests would violate the rules. Thus, both the
arbiter and the initiator contain 430FX compatibility mode logic. To enable
430FX mode, set the EN_TBFX bit as indicated in 0x40—Device Control
When EN_TBFX is enabled, the arbiter ensures that the two compatibility
rules are satisfied. Before GNT is asserted by the PCI arbiter, this internal arbiter
may still logical OR the two requests. However, once the GNT is issued, this
arbiter must lock in its decision and now route only the granted request to the
REQ pin. The arbiter decision lock happens regardless of the state of FRAME
because it does not know when FRAME will be asserted. (Typically, each initiator
will assert FRAME on the cycle following GNT.)
When FRAME is asserted, the initiator’s responsibility is to remove its request
at the same time. The arbiter’s responsibility is to allow this request to flow
through to REQ and not allow the other request to hold REQ asserted. The
decision lock may be removed at the end of the transaction: for example, when the
bus is idle (FRAME and IRDY). The arbiter decision may then continue
asynchronously until GNT is again asserted.
相关PDF资料 |
PDF描述 |
|---|---|
| FVXO-HC53BR-FREQ | VCXO, CLOCK, 0.75 MHz - 250 MHz, HCMOS OUTPUT |
| FVXO-HC72BR-FREQ | VCXO, CLOCK, 0.75 MHz - 180 MHz, HCMOS OUTPUT |
| FVXO-HC73B-FREQ | VCXO, CLOCK, 0.75 MHz - 250 MHz, HCMOS OUTPUT |
| FVXO-LC52BR-FREQ | VCXO, CLOCK, 0.75 MHz - 1000 MHz, LVDS OUTPUT |
| FVXO-LC72BR-FREQ | VCXO, CLOCK, 0.75 MHz - 1000 MHz, LVDS OUTPUT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| FUSZ03 | 制造商:Honeywell Sensing and Control 功能描述: |
| FUTURE 1AA PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
| FUTURE 2AA PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
| FUTURE 2C PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
| FUTURE 3D PLUS | 制造商:Ansmann 功能描述: 制造商:ANSMANN AG 功能描述: |
发布紧急采购，3分钟左右您将得到回复。