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型号： HW-V5-ML561-UNI-G
厂商： Xilinx Inc
文件页数： 56/140页
文件大小： 0K
描述： EVALUATION PLATFORM VIRTEX-5
产品变化通告： Adapter Replacement 23/May/2008
Development Systems Discontinuation 16/Jan/2012
标准包装： 1
系列： Virtex®-5 LXT
类型： FPGA
适用于相关产品： XC5VLX50T-FFG1136
所含物品： 开发平台，小型闪存卡，缆线，DDR2 DIMM，电源和软件
相关产品： XC5VLX50T-3FFG665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA
XC5VLX50T-3FFG1136C-ND - IC FPGA VIRTEX-5 50K 1136FBGA
XC5VLX50T-3FF665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA
XC5VLX50T-3FF1136C-ND - IC FPGA VIRTEX-5 50K 1136FBGA
XC5VLX50T-2FFG665I-ND - IC FPGA VIRTEX-5 50K 665FCBGA
XC5VLX50T-2FFG665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA
XC5VLX50T-2FFG1136I-ND - IC FPGA VIRTEX-5 50K 1136FBGA
XC5VLX50T-2FFG1136C-ND - IC FPGA VIRTEX-5 50K 1136FBGA
XC5VLX50T-2FF665I-ND - IC FPGA VIRTEX-5 50K 665FCBGA
XC5VLX50T-2FF665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA
更多...
Chapter 7: ML561 Hardware-Simulation Correlation
R
illustrated here for these signals can be easily adopted to perform SI analysis for any other
memory interface signal on the ML561 board.
This chapter presents the SI results for the following six data bit signals:
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DDR2 component DQ bit (DDR2_DQ_BY2_B3) for write operations
DDR2 component DQ bit (DDR2_DQ_BY2_B3) for read operations
DDR2 DIMM DQ bit (DDR2_DIMM_DQ_BY2_B3) for write operations
DDR2 DIMM DQ bit (DDR2_DIMM_DQ_BY2_B3) for read operations
QDRII D bit (QDR2_D_BY0_B5) for write operations
QDRII Q bit (QDR2_Q_BY0_B5) for read operations
Test Setup
Hardware measurements were performed for the six specific signal nets, and then signal
integrity (SI) simulations were performed for correlation and extrapolation. The test setup
consisted of the following hardware equipment, simulation software tools, the stimulus
test pattern, and test criteria for determining the quality of signals. The test bench is
designed so that the test pattern is applied only to the signal under test, and all other data
bits to the same memory interface are kept in a quiet Low state. This setup ensures that the
hardware measurement is not altered due to any simultaneous switching output (SSO)
effect.
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Hardware measurement equipment
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Agilent DSO80604B 6 GHz oscilloscope
Agilent 1131A 3.5 GHz Infiniimax probe amplifier
Agilent E2675A (Differential browser) or E2677A (Differential solder-in probe) or
N5425A (ZIF probe)
Virtex-5 FPGA ML561 , Rev B2 board: S/N 103
SRS Model CG635 Synthesized Clock Generator for low jitter clock source
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Simulation software
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Mentor Graphics HyperLynx EXT, Version 7.5 with LineSim and BoardSim
features
Xilinx Virtex-5 FPGA IBIS package file: ff1136_5vlx50t.pkg , Rev 1.0 dated
June 12, 2006
ML561, Rev B layout file: ML561_B_041706.hyp
Micron DDR2-667 IBIS model for output and ODT input
Micron PC2-5300 RDIMM IBIS model
Molex DDR2 DIMM socket specification (P/N 087705-1041)
Samsung QDRII HSTL 1.8V IBIS model
I BISWriter Utility of ISE software suite to create customized IBIS model of the
FPGA1 (U7) and FPGA3 (U34) devices on the ML561 board: Model files
ml561_fpga1_u7.ibs and ml561_fpga3_u34.ibs . (See “How to Generate a
User-Specific FPGA IBIS Model,” page 93 for steps on how to create a customized
IBIS model of Virtex-5 FPGA for your design.)
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Stimulus
Pseudo Random Bit Stream (PRBS) is accepted as the most effective test pattern to
measure the quality of data signals because, unlike the periodic signals like clock and
56
www.xilinx.com
Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
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相关代理商/技术参数
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HW-V5-ML561-UNI-G-J 功能描述:EVALUATION PLATFORM VIRTEX-5 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Virtex®-5 LXT 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
HW-V5-PCIE2-UNI-G 功能描述:KIT DEV PCIEXPRESS GTX VIRTEX5 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Virtex® -5 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
HW-VID-KIT 功能描述:可编程逻辑 IC 开发工具 Lattice Video Interface Kit RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
HW-VL1 制造商:IDEC CORPORATION 功能描述:BARRIER
HW-VL2 制造商:IDEC Corporation 功能描述:COVER;HW FNGR SAFE CONTAC CVR 制造商:IDEC CORPORATION 功能描述:HW FNGR SAFE CONTAC CVR
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