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| 型号： | HW-V5-ML561-UNI-G |
| 厂商： | Xilinx Inc |
| 文件页数： | 93/140页 |
| 文件大小： | 0K |
| 描述： | EVALUATION PLATFORM VIRTEX-5 |
| 产品变化通告： | Adapter Replacement 23/May/2008 Development Systems Discontinuation 16/Jan/2012 |
| 标准包装： | 1 |
| 系列： | Virtex®-5 LXT |
| 类型： | FPGA |
| 适用于相关产品： | XC5VLX50T-FFG1136 |
| 所含物品： | 开发平台，小型闪存卡，缆线，DDR2 DIMM，电源和软件 |
| 相关产品： | XC5VLX50T-3FFG665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA XC5VLX50T-3FFG1136C-ND - IC FPGA VIRTEX-5 50K 1136FBGA XC5VLX50T-3FF665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA XC5VLX50T-3FF1136C-ND - IC FPGA VIRTEX-5 50K 1136FBGA XC5VLX50T-2FFG665I-ND - IC FPGA VIRTEX-5 50K 665FCBGA XC5VLX50T-2FFG665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA XC5VLX50T-2FFG1136I-ND - IC FPGA VIRTEX-5 50K 1136FBGA XC5VLX50T-2FFG1136C-ND - IC FPGA VIRTEX-5 50K 1136FBGA XC5VLX50T-2FF665I-ND - IC FPGA VIRTEX-5 50K 665FCBGA XC5VLX50T-2FF665C-ND - IC FPGA VIRTEX-5 50K 665FCBGA 更多... |
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How to Generate a User-Specific FPGA IBIS Model
How to Generate a User-Specific FPGA IBIS Model
The following steps indicate how to generate an IBIS model:
1.
2.
3.
4.
5.
6.
7.
Under ISE, open your fully compiled project.
Go to the Tcl Shell tab, and issue an ibiswriter command as:
ibiswriter –allmodels <your top level project design file>.ncd <name up
to 24 lowercase characters>.ibs ;
For example, ibiswriter –allmodels mem_interface_top.ncd
ml561_fpga3_u34.ibs
(under the “Device Models” sidebar link). Then unzip the ZIP file containing the
device package files and extract a package file for your device, for example,
ff1136_5vlx50t.pkg . Place this file in the same directory as the FPGA IBIS file (for
example, ml561_fpga3_u34.ibs ).
Open the ml561_fpga3_u34.ibs file generated by ibiswriter in HyperLynx Visual
IBIS Editor. Check the file for correctness by clicking on the check ( ) button in the top
toolbar. Warnings are okay.
Open the ff1136_5vlx50t.pkg file using a text editor and locate the [Define
Package Model] line. Copy and paste this line into the ml561_fpga3_u34.ibs file
just above the line with the [Package] declaration. Edit the copied line to change
[Define Package Model] to [Package Model] .
Again, check the file for correctness by clicking on the check ( ) button in the top
toolbar. Multiple errors will appear. The package model file defines I/O definitions for
all usable pins, but now ibiswriter only declares pins defined under the UCF. Thus
errors are displayed for all the undefined pins, for example:
ERROR - Pin 'AK9' found in Package_Model 'ff1136_xc5vlx50t_fga0106_dc' Pin_Numbers
list not found in Component 'VIRTEX-5' Pin list.
Copy all these errors into a text file with a .txt file type.
?
?
?
?
?
Open this text file with Excel and provide the delimiter as (‘), which puts all the
unused pin names in one column. Delete all other columns before and after the
one with the pin names.
In column 2, fill in Unused_IO for all pins.
In column 3, fill in the name of one of the I/O standards defined under the
[Model] section of the ml561_fpga3_u34.ibs file, for example,
LVCMOS25_S_12. Choose a name that is not an output only standard, because it
might conflict with other outputs in the same bank.
Right-justify the indentation for all three columns and make sure that each
column is wider by a few spaces than the longest string in that column.
Save this file with the Save As command in Excel using the Formatted Text (space
delimited) ( *.prn ) option to create a text file with text columns separated by
spaces. (The IBIS checker gives a warning if the .ibs file contains tabs.)
8.
9.
Open the .prn file with a text editor and copy all these lines to the .ibs file at the end
of the [Pin] definitions section (just above the [Diff Pin] declarations).
Check ( ) the .ibs file again. There should not be any errors. Again, warnings are
okay.
10. The result is an accurate custom-made IBIS model of a Virtex-5 device specific to your
design.
Virtex-5 FPGA ML561 User Guide
UG199 (v1.2.1) June 15, 2009
93
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| IB8RM | SURGE SUPP 8OUT 12'CORD W/REMOTE |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HW-V5-ML561-UNI-G-J | 功能描述:EVALUATION PLATFORM VIRTEX-5 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Virtex®-5 LXT 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| HW-V5-PCIE2-UNI-G | 功能描述:KIT DEV PCIEXPRESS GTX VIRTEX5 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Virtex® -5 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| HW-VID-KIT | 功能描述:可编程逻辑 IC 开发工具 Lattice Video Interface Kit RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压: |
| HW-VL1 | 制造商:IDEC CORPORATION 功能描述:BARRIER |
| HW-VL2 | 制造商:IDEC Corporation 功能描述:COVER;HW FNGR SAFE CONTAC CVR 制造商:IDEC CORPORATION 功能描述:HW FNGR SAFE CONTAC CVR |
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