参数资料
型号: HW-XGI-VIDEO-US
厂商: Xilinx Inc
文件页数: 22/68页
文件大小: 0K
描述: DAUGHTER CARD VIDEO I/O VIODC
标准包装: 1
其它名称: 122-1506
HW-XGI-VIDEO-US-ND
Chapter 3: Component and S-Video Interfaces
R
definitions. For complete details, refer to the Analog Devices data sheet found at
ADV7321 Video Encoder
The Analog Devices ADV7321 video encoder device is a single monolithic chip that
performs multiple format digital-to-analog video encoder functions. Both standard and
high definition input formats are supported including: SMPTE 293M (525p), BTA T-1004
EDTV2 (525p), CCIR-656, and SMPTE 274M. Multiple output standards for both SD and
HD are also supported including: YPrPb HDTV (EIA 770.3), RGB, RGBHV, YPrPb
progressive scan (EIA-770.1, EIA-770.2) and component YPrPb (SMPTE/EBU N10). 4:2:2
or 4:4:4 data format is supported for HDTV. For all standards, external horizontal, vertical
and blanking signals or EAV/SAV timing codes control the insertion of appropriate
synchronization signals into the digital data stream and, therefore, the analog output
signal.
The ADV7321 provides user configuration options through an I 2 C bus, which enables
access to a large number of configuration registers. Under user control, the device pins are
reconfigured to match the operation selected. For instance, SD 8-bit mode configuration
only, the data input port S7-S0 would be used to transfer in a multiplexed fashion the
digital video data stream into the device. The Y and C buses would not be used. Refer to
Analog Devices ADV7321 data sheet for further details.
Video Signal Input and Output Conditioning
Each of the video input and output signals must be conditioned to ensure that the physical
interfaces meet impedance and electrical specification for each individual video standard.
Figure 3-3 illustrates the input and output conditioning circuits used for S-video,
composite and component input and output signals.
S-Video Input and Output
S-Video Input
Connector J20 provides input and output of S-Video compatible signals. For the input, the
Y (intensity) and C (color) signals are each conditioned and input into the ADV7403 video
decoder to create a digital video data stream output, which is transferred to the Xilinx
XC2VP4 FPGA for handling. Generation of S-Video output starts with a digital video
stream coming from the FPGA, written into the ADV7321A video encoder to product the
Y/C analog outputs, which are conditioned and output to the J20 S-Video connector.
S-Video Input Signal Conditioning
S-Video input signals are first conditioned using two identical circuits illustrated in
Figure 3-2 . This circuit contains both passive and active components, including the Analog
Devices ADA4412 device. This conditioning circuit insures that the input signal
impedance matches the S-Video (IEC 60933-5) specification and signal levels required by
the ADV7403.
22
Video Input/Output Daughter Card
UG235 (v1.2.1) October 31, 2007
相关PDF资料
PDF描述
ICD15S13E6GV00LF CONN DSUB HD SOCKT 15POS R/A PCB
ICD26S13E4GX00LF CONN DSUB HD SOCKT 26POS R/A PCB
ID09S33E4GV00LF CONN RCPT 9POS R/A GOLD
ID451000 CONN RECPT USB A ADAPTER
IELHK11-1-72-70.0-01-V CIRCUIT BREAKER HYMAG DP 70A
相关代理商/技术参数
参数描述
HWXX35338TR 制造商:Vishay Intertechnologies 功能描述:
HWXX38438 制造商:Vishay Semiconductors 功能描述:
HWZ1408 制造商:OHIO BUCKEYE 功能描述:
HWZ1424 制造商:OHIO BUCKEYE 功能描述:
HWZ1620 制造商:OHIO BUCKEYE 功能描述: