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| 型号： | M68HC705UGANG |
| 厂商： | 飞思卡尔半导体(中国)有限公司 |
| 英文描述： | High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| 中文描述： | 高密度互补金属氧化物半导体（HCMOS）微控制器 |
| 文件页数： | 90/112页 |
| 文件大小： | 809K |
| 代理商： | M68HC705UGANG |
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11-2
MC68HC05BD3
OPERATING MODES
11
11.1
User Mode (Normal Operation)
The normal operating mode of the MC68HC05BD3/MC68HC05BD5/MC68HC705BD3is the user
mode. The user mode will be entered if the RESET line is brought low, and the IRQ pin is within
its normal operational range (V
SS
to V
DD
), the rising edge of the RESET will cause the MCU to
enter the user mode.
11.2
Self-Check Mode
The self-check mode is provided on the MC68HC05BD3 and MC68HC05BD5 for the user to
check device functions with an on-chip self-check program masked at location $3F00 to $3FDF
under minimum hardware support. The hardware is shown in Figure 11-3. Figure 11-2 is the
criteria to enter self-check mode, where PB5’s condition is latched within first two clock cycles after
the rising edge of the reset. PB5 can then be used for other purposes. After entering the self-check
mode, CPU branches to the self-check program and carries out the self-check. Self-check is a
repetitive test, i.e. if all parts are checked to be good, the CPU will repeat the self-check again.
Therefore, the LEDs attached to Port B will be flashing if the device is good; else the combination
of LEDs’ on-off pattern can show what part of the device is suspected to be bad. Table 11-2 lists
the LEDs’ on-off patterns and their corresponding indications.
Table 11-1
Mode Selection
RESET
IRQ
PB5
MODE
V
SS
to V
DD
V
SS
to V
DD
USER
+9V Rising Edge*
V
DD
SELF-CHECK/
BOOTSTRAP
* Minimum hold time should be 2 clock cycles, after that it can be used as a normal IRQ
function pin.
Figure 11-2
Self-Check Mode Timing
5V
5V
9V
PB5
IRQ
RESET
+5V
+5V
+9V
TPG
88
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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