参数资料
型号: MCR705JP7CDWE
厂商: Freescale Semiconductor
文件页数: 99/164页
文件大小: 0K
描述: MCU 8BIT 224B RAM 28-SOIC
标准包装: 26
系列: HC05
核心处理器: HC05
芯体尺寸: 8-位
速度: 2.1MHz
连通性: SIO
外围设备: POR,温度传感器,WDT
输入/输出数: 22
程序存储器容量: 6KB(6K x 8)
程序存储器类型: OTP
RAM 容量: 224 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 4x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
包装: 管件
Revision History
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
4
Freescale Semiconductor
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
Date
Revision
Level
Description
Page
Number(s)
August,
2001
4.0
General reformat to bring document up to current publication standards
All
References to MC68HRC705SJ7 and MC68HRC705SP7 removed
throughout
All
Figure 7-9. PB4/AN4/TCMP/CMP1 Pin I/O Circuit — Change label of
register $1FF0 from mask option register to COP register
94
Table 7-2. Port B Pin Functions — PB0–PB4 — Change heading under
Comparator 1 from OPT in MOR to OPT in COPR
96
12.4 PEPROM Programming — Contact information updated
179
Figure 13-3. EPROM Security in COP and Security Register (COPR) —
Figure title change
188
13.4 EPROM Programming — Contact information updated and corrected
reference to COP register from COP to COPR
189
15.15 SIOP Timing (VDD = 5.0 Vdc) — Value change for clock (SCK) low
time
225
15.16 SIOP Timing (VDD = 3.0 Vdc) — Value change for clock (SCK) low
time
226
Section 15. Electrical Specifications — Added Figure 15-1 through Figure
15-10 and Figure 15-12
213, 214,
219, 223,
and 227
September,
2005
4.1
Updated to meet Freescale identity guidelines.
Throughout
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