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参数资料
| 型号： | MT45W2MV16BAFB-706LIT |
| 元件分类： | SRAM |
| 英文描述： | 2M X 16 PSEUDO STATIC RAM, 70 ns, PBGA54 |
| 封装： | FBGA-54 |
| 文件页数： | 2/55页 |
| 文件大小： | 816K |
| 代理商： | MT45W2MV16BAFB-706LIT |
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2 MEG x 16
ASYNC/PAGE/BURST CellularRAM MEMORY
ADVANCE
09005aef80ec6f63
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Burst CellularRAM_32.fm - Rev. A 2/18/04 EN
10
2004 Micron Technology, Inc. All Rights Reserved.
Page Mode READ Operation
Page mode is a performance-enhancing extension
to the legacy asynchronous READ operation. In page-
mode-capable products, an initial asynchronous read
access is performed, then adjacent addresses can be
read quickly by simply changing the low-order
address. Addresses A[3:0] are used to determine the
members of the 16-address CellularRAM page.
Addresses A[4] and higher must remain fixed during
the entire page mode access. Figure 6 shows the timing
for a page mode access. Page mode takes advantage of
the fact that adjacent addresses can be read in a
shorter period of time than random addresses. WRITE
operations do not include comparable page mode
functionality.
During asynchronous page mode operation, the
CLK input must be held LOW. CE# must be driven
HIGH upon completion of a page mode access. WAIT
will be driven while the device is enabled and its state
should be ignored. Page mode is enabled by setting
RCR[7] to HIGH. WRITE operations do not include
comparable page mode functionality. ADV must be
driven LOW during all page mode read accesses.
Figure 6: Page Mode READ Operation
(ADV = LOW)
Burst Mode Operation
Burst mode operations enable high-speed synchro-
nous READ and WRITE operations. Burst operations
consist of a multi-clock sequence that must be per-
formed in an ordered fashion. After CE# goes LOW, the
address to access is latched on the next rising edge of
CLK that ADV# is LOW. During this first clock rising
edge, WE# indicates whether the operation is going to
be a READ (WE# = HIGH, Figure 7 on page 11) or
WRITE (WE# = LOW, Figure 8 on page 11).
The size of a burst can be specified in the BCR as
either a fixed length or continuous. Fixed-length
bursts consist of four, eight, or sixteen words. Continu-
ous bursts have the ability to start at a specified
address and burst through the entire memory. The
latency count stored in the BCR defines the number of
clock cycles that elapse before the initial data value is
transferred between the processor and CellularRAM
device.
The WAIT output will be asserted as soon as a burst
is initiated, and will be de-asserted to indicate when
data is to be transferred into (or out of ) the memory.
WAIT will again be asserted if the burst crosses a row
boundary. Once the CellularRAM device has restored
the previous row's data and accessed the next row,
WAIT will be de-asserted and the burst can continue
The processor can access other devices without
incurring the timing penalty of the initial latency for a
new burst by suspending burst mode. Bursts are sus-
pended by stopping CLK. CLK can be stopped HIGH or
LOW. If another device will use the data bus while the
burst is suspended, OE# should be taken HIGH to dis-
able the CellularRAM outputs; otherwise, OE# can
remain LOW. Note that the WAIT output will continue
to be active, and as a result no other devices should
directly share the WAIT connection to the controller.
To continue the burst sequence, OE# is taken LOW,
then CLK is restarted after valid data is available on the
bus.
See the APPENDIX A on page 53 for restrictions on
the maximum CE# LOW time during burst operations.
If a burst suspension will cause CE# to remain LOW for
longer than tCEM, CE# should be taken HIGH and the
burst restarted with a new CE# LOW/ADV# LOW cycle.
DATA
CE#
DON’T CARE
OE#
WE#
LB#/UB#
ADDRESS
Add[0]
Add[1]
Add[2]
Add[3]
D[1]
D[2]
D[3]
tAA
tAPA
D[0]
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MT45W2MV16PFA-70 WT | 制造商:Micron Technology Inc 功能描述:2MX16 PSRAM PLASTIC WIRELESS TEMP FBGA 1.8V ASYNCH PSEUDO ST - Trays |
| MT45W2MW16BABB-706 L WT | 功能描述:IC PSRAM 32MBIT 70NS 54VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:378 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-CBGA 供应商设备封装:48-CBGA（7x7） 包装:托盘 |
| MT45W2MW16BABB-706 L WT TR | 制造商:Micron Technology Inc 功能描述:PSRAM ASYNC 1 32MBIT 2MX16 70NS 54VFBGA - Tape and Reel |
| MT45W2MW16BABB-706 WT | 制造商:Micron Technology Inc 功能描述:PSRAM Async 1 32M-Bit 2M x 16 70ns 54-Pin VFBGA Tray 制造商:Micron Technology Inc 功能描述:PSRAM ASYNC 1 32MBIT 2MX16 70NS 54VFBGA - Trays 制造商:Micron Technology Inc 功能描述:IC PSRAM 32MBIT 70NS 54VFBGA |
| MT45W2MW16BABB-706 WT TR | 功能描述:IC PSRAM 32MBIT 70NS 54VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:96 系列:- 格式 - 存储器:闪存 存储器类型:FLASH 存储容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并联 电源电压:2.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP 包装:托盘 |
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