参数资料
型号: MT45W2MV16BAFB-706LIT
元件分类: SRAM
英文描述: 2M X 16 PSEUDO STATIC RAM, 70 ns, PBGA54
封装: FBGA-54
文件页数: 5/55页
文件大小: 816K
代理商: MT45W2MV16BAFB-706LIT
2 MEG x 16
ASYNC/PAGE/BURST CellularRAM MEMORY
ADVANCE
09005aef80ec6f63
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Burst CellularRAM_32.fm - Rev. A 2/18/04 EN
13
2004 Micron Technology, Inc. All Rights Reserved.
Figure 10: Refresh Collision During READ Operation1
NOTE:
1. Non-default BCR settings: Latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
Figure 11: Refresh Collision During WRITE Operation1
NOTE:
1. Non-default BCR settings: Latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
A[20:0]
ADV#
CE#
OE#
WE#
WAIT
DQ[15:0]
CLK
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VOH
VOL
VOH
VOL
D[2]
D[1]
D[3]
VALID
ADDRESS
Additional WAIT states inserted to allow refresh completion.
LB#/UB#
UNDEFINED
DON’T CARE
D[0]
High-Z
A[20:0]
ADV#
CE#
OE#
WE#
WAIT
DQ[15:0]
CLK
D[1]
D[0]
D[3]
D[2]
VALID
ADDRESS
Additional WAIT states inserted to allow refresh completion.
LB#/UB#
DON’T CARE
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VOH
VOL
VOH
VOL
High-Z
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