参数资料
型号: MT46H128M32L2JV-54AT:A
元件分类: DRAM
英文描述: 128M X 32 DDR DRAM, 5 ns, PBGA168
封装: 12 X 12 MM, GREEN, PLASTIC, VFBGA-168
文件页数: 68/106页
文件大小: 3431K
Extended Mode Register
The EMR controls additional functions beyond those set by the mode registers. These
additional functions include drive strength, TCSR, and PASR.
The EMR is programmed via the LOAD MODE REGISTER command with BA0 = 0 and
BA1 = 1. Information in the EMR will be retained until it is programmed again, the de-
vice goes into deep power-down mode, or the device loses power.
Figure 28: Extended Mode Register
Extended mode
register (Ex)
Address bus
9
7
6
5
4
3
8
2
1
PASR
TCSR1
DS
Operation
0
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
10
...
E2
0
1
E1
0
1
0
1
E0
0
1
0
1
0
1
0
1
Partial-Array Self Refresh Coverage
Full array
1/2 array
1/4 array
Reserved
1/8 array
1/16 array
Reserved
BA0
...
BA1
1
n
n+ 1
n+ 2
0
E10
0
...
0
En
0
E9
0
E8
0
Normal AR operation
All other states reserved
An
E6
0
1
0
1
E7
0
1
E5
0
1
0
1
0
1
0
1
Drive Strength
Full strength
1/2 strength
1/4 strength
3/4 strength
Reserved
E7–E0
Valid
En + 2
0
1
En + 1
0
1
0
1
Mode Register Definition
Standard mode register
Status register
Extended mode register
Reserved
Notes: 1. On-die temperature sensor is used in place of TCSR. Setting these bits will have no effect.
2. The integer n is equal to the most significant address bit.
Temperature-Compensated Self Refresh
This device includes a temperature sensor that is implemented for automatic control of
the self refresh oscillator. Programming the temperature-compensated self refresh
(TCSR) bits will have no effect on the device. The self refresh oscillator will continue to
refresh at the optimal factory-programmed rate for the device temperature.
2Gb: x16, x32 Mobile LPDDR SDRAM
Extended Mode Register
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
64
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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