参数资料
型号: MT46H128M32L2JV-54AT:A
元件分类: DRAM
英文描述: 128M X 32 DDR DRAM, 5 ns, PBGA168
封装: 12 X 12 MM, GREEN, PLASTIC, VFBGA-168
文件页数: 8/106页
文件大小: 3431K
Revision History
Rev. M – 11/10
Relaxed input capacitance for CK/CK# max from 3.0 to 3.5pF. This change was inten-
ded to have been included in the Rev K update.
Rev. L – 09/10
Added A14 to 168-ball diagram.
Added Package Block Diagram section.
Rev. K – 08/10
Added contact factory note for AT.
Deleted all rows except the full array row in the IDD6 table; added note 14 in the table.
Relaxed the input capacitance: command and address from 3.0 to 3.5pF.
Rev. J – 06/10
Updated AT IDD tables.
Rev. H – 05/10
Added reduced page mode.
Updated IDD tables.
Changed status to Production.
Rev. G – 04/10
Changed IOZ,min in table 5 from -5A to -1.5A and IOX,max from 5A to 1.5A.
Updated the 85°C IDD tables:
– IDD0 x16 and x32 for -5, -54 and -6.
– IDD2N x16 and x32 for -5 and -54.
– IDD2NS x16 and x32 for -5 and -54.
– IDD3N x16 and x32 for all speed grades.
– IDD3NS x16 and x32 for -5, -54, and -6.
– IDD4R and Idd4W x16 and x32 for -5, -54, and -6.
– IDD5A x16 and x32 for all speed grades.
Rev. F – 04/10
Changed A9 from DQ23 to DQS3 in 240-Ball FBGA – 14mm x 14mm (Top View), x32
Only figure.
Rev. E – 03/10
Added configuration information to figure 1.
2Gb: x16, x32 Mobile LPDDR SDRAM
Revision History
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
105
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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