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参数资料
型号： ORT82G5-2BM680
厂商： LATTICE SEMICONDUCTOR CORP
元件分类： FPGA
英文描述： FPGA, 1296 CLBS, 380000 GATES, PBGA680
封装： PLASTIC, BGA-680
文件页数： 35/110页
文件大小： 1459K
代理商： ORT82G5-2BM680
30
Lattice Semiconductor
Data Sheet
January 25, 2002
8b/10b SERDES Backplane Interface FPSC
ORCA ORT82G5 1.0-1.25/2.0-2.5/3.125-3.5 Gbits/s
Backplane Transceiver Core Detailed
Description (continued)
5-8577 (F)
Figure 10. Interconnect of Streams for FIFO
Alignment
Multichannel Alignment (Backplane
→
FPGA)
The alignment FIFO allows the transfer of all data to
the system clock. The FIFO sync block (Figure 10)
allows the system to be congured to allow the frame
alignment of multiple slightly varying data streams. This
optional alignment ensures that matching SERDES
streams will arrive at the FPGA end in perfect data
sync.
The ORT82G5 has a total of 8 channels (4 per SER-
DES). The incoming data of these channels can be
synchronized in several ways, or they can be indepen-
dent of one other. For example, all four channels in a
SERDES can be aligned together to form a communi-
cation channel with a bandwidth of 10 Gbits/s as shown
in Figure 11.
Optionally, the alignment can be extended across SER-
DES to align all 8 channels in ORT82G5 as shown in
Figure 12. Individual channels within an alignment
group can be disabled (i.e., power down) without dis-
rupting other channels.
Alternatively, two channels within a SERDES can be
aligned together; channel A and B and/or channel C
and D can form a pair as shown in Figure 13.
0673(F)
Figure 11. Example of SERDES A Alignment and
SERDES B Alignment
0674
Figure 12. Example of SERDES A and B Alignment
Note: Streams A and B of SERDES B are not aligned.
0675
Figure 13. Example of Multiple Twin Channel
Alignment
SERDES A
STREAM A
SERDES A
STREAM B
SERDES A
STREAM C
SERDES A
STREAM D
SERDES B
STREAM A
SERDES B
STREAM B
SERDES B
STREAM C
FIFO
SYNC
SERDES B
STREAM D
SERDES A
SERDES B
SERDES A Stream A
ALL 4 ALIGNMENT OF SERDES A AND SERDES B
t0
t1
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
ALL 8 ALIGNMENT OF SERDES A AND SERDES B
t0
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
TWO CHANNEL ALIGNMENT
t1 t2
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
t0
SERDES B Stream D
SERDES B Stream C
SERDES B Stream B
SERDES B Stream A
SERDES A Stream A
SERDES A Stream B
SERDES A Stream C
SERDES A Stream D
TWIN ALIGNMENT OF STREAM A & B OF SERDES A
TWIN ALIGNMENT OF STREAM C & D OF SERDES A
TWIN ALIGNMENT OF STREAM C & D OF SERDES B
相关PDF资料
PDF描述
ORT82G5-3BM680 FPGA, 1296 CLBS, 380000 GATES, PBGA680
OS10040280G-012 FIBER OPTIC RECEIVER, 1290-1600nm, PANEL MOUNT, FC/APC CONNECTOR
OT-WBSC-Y-A-10-X-9-M-3-05-FA FIBER OPTIC SPLITTER/COUPLER, 1X2PORT, 10.0, PANEL MOUNT, FC/APC CONNECTOR
OT-WBSC-Y-A-50-13-9-F-1-05-FA FIBER OPTIC SPLITTER/COUPLER, 1X2PORT, 50.0, PANEL MOUNT, FC/APC CONNECTOR
OT-WBSC-Y-A-50-X-9-O-1-99-SA FIBER OPTIC SPLITTER/COUPLER, 1X2PORT, 50.0, PANEL MOUNT, SC/APC CONNECTOR
相关代理商/技术参数
参数描述
ORT82G5-2BM680C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2BM680I 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2F680C 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 2.7Gbits/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2F680I 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORT82G5-2FN680C 功能描述:FPGA - 现场可编程门阵列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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