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参数资料
| 型号： | S29XS064R0PBHW010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44 |
| 封装： | 7.50 X 5 MM, LEAD FREE, FBGA-44 |
| 文件页数： | 28/65页 |
| 文件大小： | 2116K |
| 代理商： | S29XS064R0PBHW010 |
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34
S29VS/XS-R MirrorBit
Flash Family
S29VS_XS064R_00_06 July 22, 2011
Data
Sheet
(Adv an ce
Inf o r m a t io n)
11.3.5
Burst Length Configuration
The device supports four different read modes: continuous mode, and 8 and 16 word linear with wrap around
modes. A continuous sequence (default) begins at the starting address and advances the address pointer
until the burst operation is complete. If the highest address in the device is reached during the continuous
burst read mode, the address pointer wraps around to the lowest address.
For example, an eight-word linear read with wrap around begins on the starting address written to the device
and then advances to the next 8 word boundary. The address pointer then returns to the 1st word after the
previous eight word boundary, wrapping through the starting location. The sixteen linear wrap around mode
operates in a fashion similar to the eight-word mode.
Table 11.3 shows the CR2-CR0 and settings for the four read modes.
Notes
1. Upon power-up or hardware reset the default setting is continuous.
2. All other conditions are reserved.
11.3.6
Burst Wrap Around
By default, the device will perform burst wrap around with CR3 set to a ‘1’. Changing the CR3 to a ‘0’ disables
burst wrap around.
11.3.7
RDY Configuration
By default, the device is set so that the RDY pin will output VOH whenever there is valid data on the outputs.
The device can be set so that RDY goes active one data cycle before active data. CR8 determines this
setting; “1” for RDY active (default) with data, “0” for RDY active one clock cycle before valid data.
11.3.8
RDY Polarity
By default, the RDY pin will always indicate that the device is ready to handle a new transaction with CR10
set to a “1”. In this case, the RDY pin is active high. Changing the CR10 to a ‘0’ sets the RDY pin to be active
low. In this case, the RDY pin will always indicate that the device is ready to handle a new transaction when
low.
Table 11.3 Burst Length Configuration
Burst Modes
Address Bits
CR2
CR1
CR0
Continuous
0
8-word linear
0
1
0
16-word linear
0
1
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