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参数资料
| 型号： | S29XS064R0PBHW010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44 |
| 封装： | 7.50 X 5 MM, LEAD FREE, FBGA-44 |
| 文件页数： | 39/65页 |
| 文件大小： | 2116K |
| 代理商： | S29XS064R0PBHW010 |
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44
S29VS/XS-R MirrorBit
Flash Family
S29VS_XS064R_00_06 July 22, 2011
Data
Sheet
(Adv an ce
Inf o r m a t io n)
Legend
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first.
PD(0) = Secured Silicon Sector Lock Bit. PD(0), or bit[0].
PD(3) = Protection Mode OTP Bit. PD(3) or bit[3].
SA = Address of the sector to be verified (in autoselect mode) or erased. SA includes BA. Address bits Amax - A13 uniquely select any sector.
BA = Address of the bank A21-A19.
CR = Configuration Register set by data bits D15-D0.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0, if unprotected, DQ0 = 1.
RD(1) = DQ1 protection indicator bit. If protected, DQ1 = 0, if unprotected, DQ1 = 1.
RD(2) = DQ2 protection indicator bit. If protected, DQ2 = 0, if unprotected, DQ2 = 1.
RD(4) = DQ4 protection indicator bit. If protected, DQ4 = 0, if unprotected, DQ4 = 1.
WBL = Write Buffer Location. Address must be within the same write buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes
1. See Table 9.1 for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the autoselect command sequence, all bus cycles are write cycles.
4. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD and PD.
5. Unless otherwise noted, address bits Amax–A12 are don’t cares.
6. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The
system must write the reset command to return the device to reading array data.
7. No unlock or command cycles required when bank is reading array data.
8. The Reset command is required to return to reading array data (or to the erase-suspend-read mode if previously in Erase Suspend) when
a bank is in the autoselect mode, or if DQ5 goes high (while the bank is providing status information).
9. The fourth cycle of the autoselect command sequence is a read cycle. The system must read device IDs across the 4th, 5th, and 6th
cycles, The system must provide the bank address. See Autoselect Command Sequence on page 36 for more information.
10.
See Table 9.1 for description of bus operations.
11. See the Autoselect Command Sequence on page 36.
12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase
Suspend command is valid only during a sector erase operation, and requires the bank address.
13. The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address.
Secured Silicon Sector Command Definitions
S
e
cured
Si
licon
Sect
or
Secured Silicon
Sector Entry
3
555
AA
2AA
55
555
88
Secured Silicon
Sector Program
2XX
A0
PA
data
Secured Silicon
Sector Read
1
RA
data
Secured Silicon
Sector Exit
4
555
AA
2AA
55
555
90
XX
00
Volatile Sector Protection Command Set Definitions
DYB
Volatile Sector
Protection Command
Set Entry (17)
3
555
AA
2AA
55
(BA)
555
E0
DYB Set
2
XX
A0
(BA)
SA
00
DYB Clear
2
XX
A0
(BA)
SA
01
DYB Status Read
1
(BA)
SA
RD(0)
Volatile Sector
Protection Command
Set Exit
2XX
90
XX
00
Table 12.3 Command Definitions (Sheet 2 of 2)
Command Sequence
(Notes)
Cy
c
les
Bus Cycles (Notes 1–6)
First
Second
Third
Fourth
Fifth
Sixth
Seventh
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
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