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July 22, 2011 S29VS_XS064R_00_06
S29VS/XS-R MirrorBit
Flash Family
47
Da ta
Sh e e t
(Adv a n ce
In f o r m ation)
13.3
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any address in the
same bank, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. Note that OE# must be low during toggle bit status reads. When the operation is complete,
DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately tASP, all sectors protected toggle time, then returns to reading array data. If not all selected
sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the
selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alternatively, the system can use
If a program address falls within a protected sector, DQ6 toggles for approximately tPSP after the program
command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
algorithm is complete.
See the following for additional information: (toggle bit flowchart),
Figure 19.9 (toggle bit timing diagram), and
13.4
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that
is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have been selected for erasure.
Note that OE# must be low during toggle bit status reads. But DQ2 cannot distinguish whether the sector is
actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is actively erasing,
or is in Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus, both status bits
and DQ6.