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参数资料
| 型号： | S29XS064R0PBHW010 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44 |
| 封装： | 7.50 X 5 MM, LEAD FREE, FBGA-44 |
| 文件页数： | 6/65页 |
| 文件大小： | 2116K |
| 代理商： | S29XS064R0PBHW010 |
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14
S29VS/XS-R MirrorBit
Flash Family
S29VS_XS064R_00_06 July 22, 2011
Data
Sheet
(Adv an ce
Inf o r m a t io n)
5.
Input/Output Descriptions
6.
Logic Symbol
Signal
Description
A21-A16
Address Inputs.
A/DQ15–A/DQ0
Multiplexed Address/Data input/output.
CE#
Chip Enable Input. Asynchronous relative to CLK for the Burst mode.
OE#
Output Enable Input. Asynchronous relative to CLK for the Burst mode.
WE#
Write Enable Input.
VCC
Device Power Supply (1.70 V–1.95 V).
VCCQ
Input/Output Power Supply (1.70 V–1.95 V).
VSS
Ground.
VSSQ
Input/Output Ground.
NC
Not Connected. No device internal signal is connected to the package connector nor is there any future plan to
use the connector for a signal. The connection may safely be used for routing space for a signal on a Printed
Circuit Board (PCB).
RDY
Ready output; indicates the status of the Burst read. VOL= data invalid. VOH = data valid.
CLK
The first rising edge of CLK in conjunction with AVD# low latches address input and activates burst mode
operation. After the initial word is output, subsequent rising edges of CLK increment the internal address
counter. CLK should remain low during asynchronous access.
AVD#
Address Valid input. Indicates to device that the valid address is present on the address inputs (address bits
A15–A0 are multiplexed, address bits Amax–A16 are address only).
VIL = for asynchronous mode, indicates valid address; for burst mode, causes starting address to be latched on
rising edge of CLK.
VIH= device ignores address inputs.
RESET#
Hardware reset input. VIL= device resets and returns to reading array data.
VPP
At 9V, accelerates programming. At VIL, disables program and erase functions. Should be at VIH for all other
conditions.
5 to 8
A/DQ15–
A/DQ0
Amax–A16
CE#
OE#
WE#
RESET#
CLK
RDY
AVD#
VPP
Amax indicates the highest order address bit.
16
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