参数资料
型号: W9725G6JB25I
厂商: Winbond Electronics
文件页数: 16/87页
文件大小: 0K
描述: IC DDR2 SDRAM 256MBIT 84WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR2 SDRAM
存储容量: 256M(16Mx16)
速度: 2.5ns
接口: 并联
电源电压: 1.7 V ~ 1.9 V
工作温度: -40°C ~ 95°C
封装/外壳: 84-TFBGA
供应商设备封装: 84-WBGA(8x12.5)
包装: 托盘
W9725G6JB
7.2.3.1
Extended Mode Register for OCD Impedance Adjustment
OCD impedance adjustment can be done using the following EMRS mode. In drive mode all outputs
are driven out by DDR2 SDRAM. In Drive (1) mode, all DQ, DQS signals are driven HIGH and all
DQS signals are driven LOW. In Drive (0) mode, all DQ, DQS signals are driven LOW and all DQS
signals are driven HIGH. In adjust mode, BL = 4 of operation code data must be used. In case of OCD
calibration default, output driver characteristics have a nominal impedance value of 18 Ohms during
nominal temperature and voltage conditions. OCD applies only to normal full strength output drive
setting defined by EMR (1) and if reduced strength is set, OCD default driver characteristics are not
applicable. When OCD calibration adjust mode is used, OCD default output driver characteristics are
not applicable. After OCD calibration is completed or driver strength is set to default, subsequent
EMRS commands not intended to adjust OCD characteristics must specify A[9:7] as ?000? in order to
maintain the default or calibrated value.
Table 1 – OCD Drive Mode Program
A9
0
0
0
1
1
A8
0
0
1
0
1
A7
0
1
0
0
1
Operation
OCD calibration mode exit
Drive (1) DQ, DQS HIGH and DQS LOW
Drive (0) DQ, DQS LOW and DQS HIGH
Adjust mode
OCD calibration default
7.2.3.2
OCD Impedance Adjust
To adjust output driver impedance, controllers must issue the ADJUST EMRS command along with a
4 bit burst code to DDR2 SDRAM as in table 2. For this operation, Burst Length has to be set to BL =
4 via MRS command before activating OCD and controllers must drive the burst code to all DQs at the
same time. D T0 in table 2 means all DQ bits at bit time 0, D T1 at bit time 1, and so forth. The driver
output impedance is adjusted for all DDR2 SDRAM DQs simultaneously and after OCD calibration, all
DQs and DQS?s of a given DDR2 SDRAM will be adjusted to the same driver strength setting. The
maximum step count for adjustment is 16 and when the limit is reached, further increment or
decrement code has no effect. The default setting may be any step within the 16 step range. When
Adjust mode command is issued, AL from previously set value must be applied.
Table 2 – OCD Adjust Mode Program
4 bit b urst   code inputs to all DQs
Operation
D T0
0
0
0
0
1
0
0
1
1
D T1
0
0
0
1
0
1
1
0
0
D T2
0
0
1
0
0
0
1
0
1
D T3
0
1
0
0
0
1
0
1
0
Pull-up driver strength
NOP (No operation)
Increase by 1 step
Decrease by 1 step
NOP
NOP
Increase by 1 step
Decrease by 1 step
Increase by 1 step
Decrease by 1 step
Pull-down driver strength
NOP (No operation)
NOP
NOP
Increase by 1 step
Decrease by 1 step
Increase by 1 step
Increase by 1 step
Decrease by 1 step
Decrease by 1 step
Other Combinations
- 16 -
Reserved
Publication Release Date: Nov. 29, 2011
Revision A02
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