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参数资料
| 型号： | W9725G6JB25I |
| 厂商： | Winbond Electronics |
| 文件页数： | 27/87页 |
| 文件大小： | 0K |
| 描述： | IC DDR2 SDRAM 256MBIT 84WBGA |
| 标准包装： | 200 |
| 格式 - 存储器： | RAM |
| 存储器类型： | DDR2 SDRAM |
| 存储容量： | 256M（16Mx16） |
| 速度： | 2.5ns |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.9 V |
| 工作温度： | -40°C ~ 95°C |
| 封装/外壳： | 84-TFBGA |
| 供应商设备封装： | 84-WBGA（8x12.5） |
| 包装： | 托盘 |
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W9725G6JB
7.6
Precharge operation
The Precharge Command is used to precharge or close a bank that has been activated. The
Precharge Command can be used to precharge each bank independently or all banks simultaneously.
Three address bits A10, BA0 and BA1 are used to define which bank to precharge when the
command is issued.
Table 4 – Bank selection for precharge by address bits
A10
LOW
LOW
LOW
LOW
HIGH
BA1
LOW
LOW
HIGH
HIGH
Don ? t Care
BA0
LOW
HIGH
LOW
HIGH
Don ? t Care
Precharge Bank(s)
Bank 0 only
Bank 1 only
Bank 2 only
Bank 3 only
All Banks
7.6.1
Burst read operation followed by precharge
Minimum Read to Precharge command spacing to the same bank = AL + BL/2 + max(RTP, 2) - 2 clks
For the earliest possible precharge, the precharge command may be issued on the rising edge which
is “Additive Latency (AL) + BL/2 + max(RTP, 2) - 2 clocks” after a Read command. A new bank active
(command) may be issued to the same bank after the RAS precharge time (t RP ). A precharge
command cannot be issued until t RAS is satisfied.
The minimum Read to Precharge spacing has also to satisfy a minimum analog time from the rising
clock edge that initiates the last 4-bit prefetch of a Read to Precharge command. This time is called
t RTP (Read to Precharge). For BL = 4 this is the time from the actual read (AL after the Read
command) to Precharge command. For BL = 8 this is the time from AL + 2 clocks after the Read to the
Precharge command. (Example timing waveforms refer to 10.15 to 10.19 Burst read operation
followed by precharge diagram in Chapter 10)
7.6.2
Burst write operation followed by precharge
Minimum Write to Precharge Command spacing to the same bank = WL + BL/2 clks + t WR
For write cycles, a delay must be satisfied from the completion of the last burst write cycle until the
Precharge Command can be issued. This delay is known as a write recovery time (t WR ) referenced
from the completion of the burst write to the precharge command. No Precharge command should be
issued prior to the t WR delay. (Example timing waveforms refer to 10.20 to 10.21 Burst write operation
followed by precharge diagram in Chapter 10)
7.7
Auto-precharge operation
Before a new row in an active bank can be opened, the active bank must be precharged using either
the Precharge command or the Auto-precharge function. When a Read or a Write command is given
to the DDR2 SDRAM, the CAS timing accepts one extra address, column address A10, to allow the
active bank to automatically begin precharge at the earliest possible moment during the burst read or
write cycle. If A10 is LOW when the READ or WRITE command is issued, then normal Read or Write
burst operation is executed and the bank remains active at the completion of the burst sequence. If
A10 is HIGH when the Read or Write command is issued, then the Auto-precharge function is
engaged. During Auto-precharge, a Read command will execute as normal with the exception that the
active bank will begin to precharge on the rising edge which is CAS Latency (CL) clock cycles before
the end of the read burst.
Publication Release Date: Nov. 29, 2011
- 27 -
Revision A02
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9725G6KB-18 | 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W9725G6KB-25 | 功能描述:IC DDR2 SDRAM 256MBIT 84WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:闪存 存储器类型:闪存 - NAND 存储容量:4G（256M x 16） 速度:- 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP I 包装:Digi-Reel® 其它名称:557-1461-6 |
| W9725G6KB-25 TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X16 |
| W9725G6KB25A | 制造商:WINBOND 制造商全称:Winbond 功能描述:DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask |
| W9725G6KB25I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics 功能描述:IC DDR2 SDRAM 256M 2.5NS 84WBGA 制造商:Winbond Electronics Corp 功能描述:IC DDR2 SDRAM 256M 2.5NS 84WBGA 制造商:Winbond 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin WBGA |
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