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| 型号： | W9725G6JB25I |
| 厂商： | Winbond Electronics |
| 文件页数： | 54/87页 |
| 文件大小： | 0K |
| 描述： | IC DDR2 SDRAM 256MBIT 84WBGA |
| 标准包装： | 200 |
| 格式 - 存储器： | RAM |
| 存储器类型： | DDR2 SDRAM |
| 存储容量： | 256M（16Mx16） |
| 速度： | 2.5ns |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.9 V |
| 工作温度： | -40°C ~ 95°C |
| 封装/外壳： | 84-TFBGA |
| 供应商设备封装： | 84-WBGA（8x12.5） |
| 包装： | 托盘 |
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W9725G6JB
36. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(per) of the input
clock. (output deratings are relative to the SDRAM input clock.)
Examples:
1) If the measured jitter into a DDR2-667 SDRAM has tJIT(per),min = - 72 pS and tJIT(per),max = + 93 pS, then
tRPRE,min(derated) = tRPRE,min + tJIT(per),min = 0.9 x tCK(avg) - 72 pS = + 2178 pS and tRPRE,max(derated) =
tRPRE,max + tJIT(per),max = 1.1 x tCK(avg) + 93 pS = + 2843 pS. (Caution on the min/max usage!)
2) If the measured jitter into a DDR2-1066 SDRAM has tJIT(per),min = - 72 pS and tJIT(per),max = + 63 pS, then
tRPRE,min(derated) = tRPRE,min + tJIT(per),min = 0.9 x tCK(avg) - 72 pS = + 1615.5 pS and tRPRE,max(derated)
= tRPRE,max + tJIT(per),max = 1.1 x tCK(avg) + 63 pS = + 2125.5 pS. (Caution on the min/max usage!)
37. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(duty) of the input
clock. (output deratings are relative to the SDRAM input clock.)
Examples:
1) If the measured jitter into a DDR2-800 SDRAM has tJIT(duty),min = - 72 pS and tJIT(duty),max = + 93 pS, then
tRPST,min(derated) = tRPST,min + tJIT(duty),min = 0.4 x tCK(avg) - 72 pS = + 928 pS and tRPST,max(derated) =
tRPST,max + tJIT(duty),max = 0.6 x tCK(avg) + 93 pS = + 1593 pS. (Caution on the min/max usage!)
2) If the measured jitter into a DDR2-1066 SDRAM has tJIT(duty),min = - 72 pS and tJIT(duty),max = + 63 pS, then
tRPST,min(derated) = tRPST,min + tJIT(duty),min = 0.4 x tCK(avg) - 72 pS = + 678 pS and tRPST,max(derated) =
tRPST,max + tJIT(duty),max = 0.6 x tCK(avg) + 63 pS = + 1188 pS. (Caution on the min/max usage!)
38. When the device is operated with input clock jitter, this parameter needs to be derated by { -tJIT(duty),max - tERR(6-
10per),max } and { - tJIT(duty),min - tERR(6-10per),min } of the actual input clock. (output deratings are relative to the
SDRAM input clock.)
Examples:
1) If the measured jitter into a DDR2-667 SDRAM has tERR(6-10per),min = - 272 pS, tERR(6-10per),max = + 293
pS, tJIT(duty),min = - 106 pS and tJIT(duty),max = + 94 pS, then tAOF,min(derated) = tAOF,min + { - tJIT(duty),max
- tERR(6-10per),max } = - 450 pS + { - 94 pS - 293 pS} = - 837 pS and tAOF,max(derated) = tAOF,max + { -
tJIT(duty),min - tERR(6-10per),min } = 1050 pS + { 106 pS + 272 pS } = + 1428 pS. (Caution on the min/max
usage!)
2) If the measured jitter into a DDR2-1066 SDRAM has tERR(6-10per),min = - 202 pS, tERR(6-10per),max = + 223
pS, tJIT(duty),min = - 66 pS and tJIT(duty),max = + 74 pS, then tAOF,min(derated) = tAOF,min + { - tJIT(duty),max -
tERR(6-10per),max } = - 350 pS + { - 74 pS - 223 pS} = - 647 pS and tAOF,max(derated) = tAOF,max + { -
tJIT(duty),min - tERR(6-10per),min } = 950 pS + { 66 pS + 202 pS } = + 1218 pS. (Caution on the min/max usage!)
39. For tAOFD of DDR2-667/800/1066, the 1/2 clock of nCK in the 2.5 x nCK assumes a tCH(avg), average input clock HIGH
pulse width of 0.5 relative to tCK(avg). tAOF,min and tAOF,max should each be derated by the same amount as the actual
amount of tCH(avg) offset present at the DRAM input with respect to 0.5.
Example:
If an input clock has a worst case tCH(avg) of 0.48, the tAOF,min should be derated by subtracting 0.02 x tCK(avg)
from it, whereas if an input clock has a worst case tCH(avg) of 0.52, the tAOF,max should be derated by adding
0.02 x tCK(avg) to it. Therefore, we have;
tAOF,min(derated) = tAC,min - [0.5 - Min(0.5, tCH(avg),min)] x tCK(avg)
tAOF,max(derated) = tAC,max + 0.6 + [Max(0.5, tCH(avg),max) - 0.5] x tCK(avg)
or
tAOF,min(derated) = Min(tAC,min, tAC,min - [0.5 - tCH(avg),min] x tCK(avg))
tAOF,max(derated) = 0.6 + Max(tAC,max, tAC,max + [tCH(avg),max - 0.5] x tCK(avg))
where tCH(avg),min and tCH(avg),max are the minimum and maximum of tCH(avg) actually measured at the DRAM
input balls.
Note that these deratings are in addition to the tAOF derating per input clock jitter, i.e. tJIT(duty) and tERR(6-10per). However
tAC values used in the equations shown above are from the timing parameter table and are not derated.
Thus the final derated values for tAOF are;
tAOF,min(derated_final) = tAOF,min(derated) + { - tJIT(duty),max - tERR(6-10per),max }
tAOF,max(derated_final) = tAOF,max(derated) + { - tJIT(duty),min - tERR(6-10per),min }
40. Timings are specified with command/address input slew rate of 1.0 V/nS.
41. Timings are specified with DQs and DM input slew rate of 1.0V/nS.
42. Timings are specified with CLK/ CLK differential slew rate of 2.0 V/nS. Timings are guaranteed for DQS signals with a
differential slew rate of 2.0 V/nS in differential strobe mode.
Publication Release Date: Nov. 29, 2011
- 54 -
Revision A02
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| W9725G6KB-18 | 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W9725G6KB-25 | 功能描述:IC DDR2 SDRAM 256MBIT 84WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:闪存 存储器类型:闪存 - NAND 存储容量:4G（256M x 16） 速度:- 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP I 包装:Digi-Reel® 其它名称:557-1461-6 |
| W9725G6KB-25 TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X16 |
| W9725G6KB25A | 制造商:WINBOND 制造商全称:Winbond 功能描述:DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask |
| W9725G6KB25I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics 功能描述:IC DDR2 SDRAM 256M 2.5NS 84WBGA 制造商:Winbond Electronics Corp 功能描述:IC DDR2 SDRAM 256M 2.5NS 84WBGA 制造商:Winbond 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin WBGA |
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