参数资料
型号: W9725G6JB25I
厂商: Winbond Electronics
文件页数: 38/87页
文件大小: 0K
描述: IC DDR2 SDRAM 256MBIT 84WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR2 SDRAM
存储容量: 256M(16Mx16)
速度: 2.5ns
接口: 并联
电源电压: 1.7 V ~ 1.9 V
工作温度: -40°C ~ 95°C
封装/外壳: 84-TFBGA
供应商设备封装: 84-WBGA(8x12.5)
包装: 托盘
W9725G6JB
9.3
Recommended DC Operating Conditions
SYM.
V DD
V DDL
V DDQ
V REF
V TT
PARAMETER
Supply Voltage
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage (System)
MIN.
1.7
1.7
1.7
0.49 x V DDQ
V REF - 0.04
TYP.
1.8
1.8
1.8
0.5 x V DDQ
V REF
MAX.
1.9
1.9
1.9
0.51 x V DDQ
V REF + 0.04
UNIT
V
V
V
V
V
NOTES
1
5
1, 5
2, 3
4
Notes:
1. There is no specific device V DD supply voltage requirement for SSTL_18 compliance. However under all conditions V DDQ
must than or equal to V DD .
2. The value of V REF may be selected by the user to provide optimum noise margin in the system. Typically the value of V REF
is expected to be about 0.5 x V DDQ of the transmitting device and V REF is expected to track variations in V DDQ .
3. Peak to peak AC noise on V REF may not exceed ? 2 % V REF (dc).
4. V TT of transmitting device must track V REF of receiving device.
5. V DDQ tracks with V DD , V DDL tracks with V DD . AC parameters are measured with V DD , V DDQ and V DDDL tied together.
9.4
ODT DC Electrical Characteristics
PARAMETER/CONDITION
Rtt effective impedance value for EMRS(A6,A2)=0,1; 75 Ω
Rtt effective impedance value for EMRS(A6,A2)=1,0; 150 Ω
Rtt effective impedance value for EMRS(A6,A2)=1,1; 50 Ω
Deviation of V M with respect to V DDQ /2
SYM.
Rtt1(eff)
Rtt2(eff)
Rtt3(eff)
Δ V M
MIN.
60
120
40
-6
NOM.
75
150
50
MAX.
90
180
60
+6
UNIT
Ω
Ω
Ω
%
NOTES
1
1
1, 2
1
Notes:
1. Test condition for Rtt measurements.
2. Optional for DDR2-667, mandatory for DDR2-800 and DDR2-1066.
Measurement Definition for Rtt(eff):
Apply V IH (ac) and V IL (ac) to test pin separately, then measure current I(V IH (ac) ) and I(V IL (ac) )
respectively. V IH (ac) , V IL (ac) , and V DDQ values defined in SSTL_18.
Rtt(eff) = (V IH(ac) – V IL(ac) ) /(I(V IHac) – I(V ILac) )
Measurement Definition for Δ V M :
Measure voltage (V M ) at test pin (midpoint) with no load.
Δ V M = ((2 x V m / V DDQ ) – 1) x 100%
9.5
Input DC Logic Level
PARAMETER
DC input logic HIGH
DC input logic LOW
SYM.
V IH(dc)
V IL(dc)
MIN.
V REF + 0.125
-0.3
MAX.
V DDQ + 0.3
V REF - 0.125
UNIT
V
V
9.6
Input AC Logic Level
PARAMETER
SYM.
MIN.
-18
MAX.
-25/25I/25A/25K/-3
MIN. MAX.
UNIT
AC input logic HIGH
V IH (ac)
V REF + 0.200
?
V REF + 0.200
V DDQ + V PEAK 1
V
AC input logic LOW
V IL (ac)
?
V REF - 0.200
V SSQ - V PEAK
1
V REF - 0.200
V
Note:
1. Refer to the page 67 sections 9.14.1 and 9.14.2 AC Overshoot/Undershoot specification table for V PEAK value: maximum
peak amplitude allowed for Overshoot/Undershoot.
Publication Release Date: Nov. 29, 2011
- 38 -
Revision A02
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