参数资料
型号: W9725G6JB25I
厂商: Winbond Electronics
文件页数: 3/87页
文件大小: 0K
描述: IC DDR2 SDRAM 256MBIT 84WBGA
标准包装: 200
格式 - 存储器: RAM
存储器类型: DDR2 SDRAM
存储容量: 256M(16Mx16)
速度: 2.5ns
接口: 并联
电源电压: 1.7 V ~ 1.9 V
工作温度: -40°C ~ 95°C
封装/外壳: 84-TFBGA
供应商设备封装: 84-WBGA(8x12.5)
包装: 托盘
W9725G6JB
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10.10
10.11
10.12
10.13
10.14
10.15
10.16
10.17
10.18
10.19
10.20
10.21
10.22
10.23
10.24
ODT Timing for Active/Standby Mode ................................................................................................. 69
ODT Timing for Power Down Mode .................................................................................................... 69
ODT Timing mode switch at entering power down mode .................................................................... 70
ODT Timing mode switch at exiting power down mode ...................................................................... 71
Data output (read) timing .................................................................................................................... 72
Burst read operation: RL=5 (AL=2, CL=3, BL=4) ................................................................................ 72
Data input (write) timing ...................................................................................................................... 73
Burst write operation: RL=5 (AL=2, CL=3, WL=4, BL=4) .................................................................... 73
Seamless burst read operation: RL = 5 ( AL = 2, and CL = 3, BL = 4) ...................................... 74
Seamless burst write operation: RL = 5 ( WL = 4, BL = 4)......................................................... 74
Burst read interrupt timing: RL =3 (CL=3, AL=0, BL=8) ............................................................. 75
Burst write interrupt timing: RL=3 (CL=3, AL=0, WL=2, BL=8) .................................................. 75
Write operation with Data Mask: WL=3, AL=0, BL=4) ............................................................... 76
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=4, tRTP ≤ 2clks) ............ 77
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=8, tRTP ≤ 2clks) ............ 77
Burst read operation followed by precharge: RL=5 (AL=2, CL=3, BL=4, tRTP ≤ 2clks) ............ 78
Burst read operation followed by precharge: RL=6 (AL=2, CL=4, BL=4, tRTP ≤ 2clks) ............ 78
Burst read operation followed by precharge: RL=4 (AL=0, CL=4, BL=8, tRTP > 2clks) ............ 79
Burst write operation followed by precharge: WL = (RL-1) = 3 .................................................. 79
Burst write operation followed by precharge: WL = (RL-1) = 4 .................................................. 80
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL =8, tRTP ≤ 2clks) ............... 80
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=4, tRTP > 2clks) ............... 81
Burst read with Auto-precharge followed by an activation to the same bank (tRC Limit): RL=5
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP ≤ 2clks) ....................................................................................... 81
10.25
Burst read with Auto-precharge followed by an activation to the same bank (tRP Limit): RL=5
(AL=2, CL= 3, internal tRCD=3, BL=4, tRTP ≤ 2clks) ....................................................................................... 82
11.
10.26
10.27
10.28
10.29
10.30
10.31
Burst write with Auto-precharge (tRC Limit): WL=2, WR=2, BL=4, tRP=3 ................................. 82
Burst write with Auto-precharge (WR + tRP Limit): WL=4, WR=2, BL=4, tRP=3 ....................... 83
Self Refresh Timing ................................................................................................................... 83
Active Power Down Mode Entry and Exit Timing ....................................................................... 84
Precharged Power Down Mode Entry and Exit Timing .............................................................. 84
Clock frequency change in precharge Power Down mode ........................................................ 85
PACKAGE SPECIFICATION .............................................................................................................. 86
Package Outline WBGA-84 (8x12.5 mm )....................................................................................................... 86
2
12.
REVISION HISTORY .......................................................................................................................... 87
Publication Release Date: Nov. 29, 2011
-3-
Revision A02
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